參數(shù)資料
型號： ADUC7129BSTZ126
廠商： Analog Devices Inc
文件頁數(shù)： 59/92頁
文件大?。?/td> 0K
描述： IC DAS MCU ARM7 ADC/DDS 80-LQFP
產(chǎn)品培訓模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 41.78MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設備： PLA，POR，PWM，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 38
程序存儲器容量： 126KB（63K x 16）
程序存儲器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉換器： A/D 10x12b; D/A 1x10b
振蕩器型： 內部
工作溫度： -40°C ~ 125°C
封裝/外殼： 80-LQFP
包裝： 托盤
ADuC702x Series
Preliminary Technical Data
Rev. 0 | Page 62 of 92
Table 87. COMxIEN1 MMR Bit Designations
Table 88. COMxIID1 MMR Bit Designations
Bit 3:1
Status Bits
Bit 0
NINT
Priority
Definition
Clearing Operation
000
1
No Interrupt.
110
0
2
Matching Network Address.
Read COMxRX.
101
0
3
Address Transmitted, Buffer Empty.
Write data to COMxTX or read COMxIID0.
011
0
1
Receive Line Status Interrupt.
Read COMxSTA0.
010
0
2
Receive Buffer Full Interrupt.
Read COMxRX.
001
0
3
Transmit Buffer Empty Interrupt.
Write data to COMxTX or read COMxIID0.
000
0
4
Modem Status Interrupt.
Read COMxSTA1 register.
Note that to receive a network address interrupt, the slave must
ensure that Bit 0 of COMxIEN0 (enable receive buffer full
interrupt) is set to 1.
COMxADR is an 8-bit, read/write network address register that
holds the address checked for by the network addressable
UART. Upon receiving this address, the device interrupts the
processor and/or sets the appropriate status bit in COMxIID1.
Bit
Name
Description
7
ENAM
Network Address Mode Enable Bit.
Set by user to enable network address mode.
Cleared by user to disable network address mode.
6
E9BT
9-Bit Transmit Enable Bit.
Set by user to enable 9-bit transmit. ENAM must be set.
Cleared by user to disable 9-bit transmit.
5
E9BR
9-Bit Receive Enable Bit.
Set by user to enable 9-bit receive. ENAM must be set.
Cleared by user to disable 9-bit receive.
4
ENI
Network Interrupt Enable Bit.
3
E9BD
Word Length.
Set for 9-bit data. E9BT has to be cleared.
Cleared for 8-bit data.
2
ETD
Transmitter Pin Driver Enable Bit.
Set by user to enable SOUT as an output in slave mode or multimaster mode.
Cleared by user; SOUT is three-state.
1
NABP
Network Address Bit, Interrupt Polarity Bit.
0
NAB
Network Address Bit.
Set by user to transmit the slave’s address.
Cleared by user to transmit data.
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