參數(shù)資料
型號: ADSP-21160M
廠商: Analog Devices, Inc.
元件分類: 數(shù)字信號處理
英文描述: DSP Microcomputer
中文描述: DSP微機(jī)
文件頁數(shù): 12/53頁
文件大?。?/td> 696K
代理商: ADSP-21160M
ADSP-21160M
12
REV. 0
TCK
TMS
I
I/S
Test Clock (JTAG). Provides a clock for JTAG boundary scan.
Test Mode Select (JTAG). Used to control the test state machine. TMS has a 20 k
internal pull-up resistor.
Test Data Input (JTAG). Provides serial data for the boundary scan logic. TDI has a
20 k
internal pull-up resistor.
Test Data Output (JTAG). Serial scan output of the boundary scan path.
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low)
after power-up or held low for proper operation of the ADSP-21160M. TRST has a
20 k
internal pull-up resistor.
Emulation Status. Must be connected to the ADSP-21160M emulator target board
connector only. EMU has a 50 k
internal pull-up resistor.
Core Instruction Fetch. Signal is active low when an external instruction fetch is
performed. Driven by bus master only. Three-state when host is bus master.
Core Power Supply. Nominally 2.5 V dc and supplies the DSP
s core processor
(40 pins).
I/O Power Supply. Nominally 3.3 V dc (46 pins).
Analog Power Supply. Nominally 2.5 V dc and supplies the DSP
s internal PLL (clock
generator). This pin has the same specifications as V
DDINT
, except that added filtering
circuitry is required.
For more information, see Power Supplies on page 6.
Analog Power Supply Return.
Power Supply Return. (83 pins)
Do Not Connect. Reserved pins that must be left open and unconnected (5 pins).
TDI
I/S
TDO
TRST
O
I/A
EMU
O (O/D)
CIF
O/T
V
DDINT
P
V
DDEXT
AV
DD
P
P
AGND
GND
NC
G
G
Table 3. Boot Mode Selection
EBOOT
1
0
0
0
0
1
LBOOT
0
0
1
0
1
1
BMS
Output
1 (Input)
1 (Input)
0 (Input)
0 (Input)
x (Input)
Booting Mode
EPROM (Connect BMS to EPROM chip select.)
Host Processor
Link Port
No Booting. Processor executes from external memory.
Reserved
Reserved
Table 2. Pin Function Descriptions (Continued)
Pin
Type
Function
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