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參數(shù)資料
| 型號： | ADMCF341-EVALKIT |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| 中文描述： | DashDSP⑩28引腳閃存混合信號增強的DSP與模擬前端 |
| 文件頁數(shù)： | 4/36頁 |
| 文件大?。?/td> | 1106K |
| 代理商： | ADMCF341-EVALKIT |
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REV. 0
–4–
ADMCF341
SPECIFICATIONS
(continued)
FLASH MEMORY
Parameter
Min
Typ
Max
Unit
Conditions/Comments
Endurance
Data Retention
Program and Erase Operating Temperature
Read Operating Temperature
10,000
15
0
–40
Cycles
Years
∞
C
∞
C
Cycle = Erase/Program/Verify
85
+85
Specifications subject to change without notice.
TIMING PARAMETERS
Parameter
Min
Max
Unit
Clock Signals
Signal t
CK
is defined as 0.5 t
CKIN
. The ADMCF341 uses an input clock with
a frequency equal to half the instruction rate; a 10 MHz input clock (which is
equivalent to 100 ns) yields a 50 ns processor cycle (equivalent to 20 MHz).
When t
CK
values are within the range of 0.5 t
CKIN
period, they should be
substituted for all relevant timing parameters to obtain specification value as
in the following example:
t
t
ns
ns
ns
ns
CKH
CK
=
-
=
￥
-
=
0 5
.
10
0 5
.
50
10
15
Timing Requirements:
t
CKIN
t
CKIL
t
CKIH
Switching Characteristics:
t
CKL
t
CKH
t
CKOH
Control Signals
Switching Characteristics
t
RSP
PWM Shutdown Signals
Switching Characteristics
t
PWMTPW
PWMTRIP
CLKIN Period
CLKIN Width Low
CLKIN Width High
100
20
20
150
ns
ns
ns
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
0.5 t
CK
– 10
0.5 t
CK
– 10
0
ns
ns
ns
20
RESET
Width Low
5 t
CK
*
ns
t
CK
ns
*
Applies after power-up sequence is complete.
Specifications subject to change without notice.
CLKIN
CLKOUT
t
CKL
t
CKIL
t
CKH
t
CKIH
t
CKIN
t
CKOH
Figure 1. Clock Signals
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