參數(shù)資料
型號(hào): ADM6995L
廠商: Electronic Theatre Controls, Inc.
英文描述: 5 PORT 10/100 MB/s SINGLE CHIP ETHERNET SWITCH CONTROLLER
中文描述: 5端口10/100 MB / s的單芯片以太網(wǎng)交換控制器
文件頁(yè)數(shù): 20/57頁(yè)
文件大小: 1815K
代理商: ADM6995L
ADM6995L
Function Description
denoting the end of stream delimiter (ESD). The translated data is presented on the
internal RXD[3:0] signal lines with RXD[0] represents the least significant bit of the
translated nibble.
3.4.7
Valid Data Signal
The valid data signal (RXDV) indicates that recovered and decoded nibbles are being
presented on the internal RXD[3:0] synchronous to receive clock, RXCLK. RXDV is
asserted when the first nibble of translated /J/K is ready for transfer over the internal MII.
It remains active until either the /T/R delimiter is recognized, link test indicates failure, or
no signal is detected. On any of these conditions, RXDV is de-asserted.
3.4.8
Receive Errors
The RXER signal is used to communicate receiver error conditions. While the receiver is
in a state of holding RXDV asserted, the RXER will be asserted for each code word that
does not map to a valid code-group.
3.4.9
100Base-X Link Monitor
The 100Base-X link monitor function allows the receiver to ensure that reliable data is
being received. Without reliable data reception, the link monitor will halt both transmit
and receive operations until such time that a valid link is detected.
The ADM6995L performs the link integrity test as outlined in IEEE 100Base-X (Clause
24) link monitor state diagram. The link status is multiplexed with 10Mbits/s link status
to form the reportable link status bit in serial management register 1h, and driven to the
LNKACT pin.
When persistent signal energy is detected on the network, the logic moves into a Link-
Ready state after approximately 500 us, and waits for an enable from the auto negotiation
module. When received, the link-up state is entered, and the transmission and reception
logic blocks become active. Should auto negotiation be disabled, the link integrity logic
moves immediately to the link-up state after entering the link-ready state.
3.4.10
Carrier Sense
Carrier sense (CRS) for 100Mbits/s operation is asserted upon the detection of two
noncontiguous zeros occurring within any 10-bit boundary of the received data stream.
The carrier sense function is independent of symbol alignment. In switch mode, CRS is
asserted during either packet transmission or reception. For repeater mode, CRS is
asserted only during packet reception. When the idle symbol pair is detected in the
received data stream, CRS is de-asserted. In repeater mode, CRS is only asserted due to
receive activity. CRS is intended to encapsulate RXDV.
ADMtek Inc.
3-4
相關(guān)PDF資料
PDF描述
ADM6995 5 PORT 10/100 MB/S SINGLE CHIP ETHIERNET SWITCH CONTROLLER
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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