參數(shù)資料
型號(hào)： ADM6995L
廠商： Electronic Theatre Controls, Inc.
英文描述： 5 PORT 10/100 MB/s SINGLE CHIP ETHERNET SWITCH CONTROLLER
中文描述： 5端口10/100 MB / s的單芯片以太網(wǎng)交換控制器
文件頁(yè)數(shù)： 19/57頁(yè)
文件大小： 1815K
代理商： ADM6995L
ADM6995L
Function Description
3.4.2
Adaptive Equalizer and timing Recovery Module
All digital design is especial immune from noise environments and achieves better
correlation between production and system testing. Baud rate Adaptive Equalizer/Timing
Recovery compensates line loss induced from twisted pair and tracks far end clock at
125M samples per second. Adaptive Equalizer implemented with Feed forward and
Decision Feedback techniques meet the requirement of BER less than 10-12 for
transmission on CAT5 twisted pair cable ranging from 0 to 120 meters.
3.4.3
NRZI/NRZ and Serial/Parallel Decoder
The recovered data is converted from NRZI to NRZ. The data is not necessarily aligned
to 4B/5B code group’s boundary.
3.4.4
Data De-scrambling
The de-scrambler acquires synchronization with the data stream by recognizing idle
bursts of 40 or more bits and locking its deciphering Linear Feedback Shift Register
(LFSR) to the state of the scrambling LFSR. Upon achieving synchronization, the
incoming data is XORed by the deciphering LFSR and de-scrambled.
In order to maintain synchronization, the de-scrambler continuously monitors the validity
of the unscrambled data that it generates. To ensure this, a link state monitor and a hold
timer are used to constantly monitor the synchronization status. Upon synchronization of
the de-scrambler the hold timer starts a 722 us countdown. Upon detection of sufficient
idle symbols within the 722 us period, the hold timer will reset and begin a new
countdown. This monitoring operation will continue indefinitely given a properly
operating network connection with good signal integrity. If the link state monitor does
not recognize sufficient unscrambled idle symbols within 722 us period, the de-scrambler
will be forced out of the current state of synchronization and reset in order to re-acquire
synchronization.
3.4.5
Symbol Alignment
The symbol alignment circuit in the ADM6995L determines code word alignment by
recognizing the /J/K delimiter pair. This circuit operates on unaligned data from the de-
scrambler. Once the /J/K symbol pair (11000 10001) is detected, subsequent data is
aligned on a fixed boundary.
3.4.6
Symbol Decoding
The symbol decoder functions as a look-up table that translates incoming 5B symbols
into 4B nibbles as shown in Table 1. The symbol decoder first detects the /J/K symbol
pair preceded by idle symbols and replaces the symbol with MAC preamble. All
subsequent 5B symbols are converted to the corresponding 4B nibbles for the duration of
the entire packet. This conversion ceases upon the detection of the /T/R symbol pair
ADMtek Inc.
3-3
相關(guān)PDF資料
PDF描述
ADM6995 5 PORT 10/100 MB/S SINGLE CHIP ETHIERNET SWITCH CONTROLLER
ADS-930 16-Bit, 500kHz Sampling A/D Converters
ADS-930MC 16-Bit, 500kHz Sampling A/D Converters
ADS-930MM 16-Bit, 500kHz Sampling A/D Converters
ADS-EVAL3 16-Bit, 500kHz Sampling A/D Converters
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADM6995LAAT1 功能描述:IC SWITCH CNTRLR 10/100 128QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ADM6995LAAT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
ADM6995LCACT1 制造商:Infineon Technologies AG 功能描述:
ADM6995LCACT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
ADM6995LCADT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
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