參數(shù)資料
型號: ADM6995L
廠商: Electronic Theatre Controls, Inc.
英文描述: 5 PORT 10/100 MB/s SINGLE CHIP ETHERNET SWITCH CONTROLLER
中文描述: 5端口10/100 MB / s的單芯片以太網(wǎng)交換控制器
文件頁數(shù): 13/57頁
文件大小: 1815K
代理商: ADM6995L
ADM6995L
Interface Description
2.2 Pin Description by Function
ADM6995L pins are categorized into one of the following groups:
Section 2.2.1 Twisted Pair Interface
Section 2.2.2 Settings
Section 2.2.3 LED Interface
Section 2.2.4 EEPROM/Management Interface
Section 2.2.5 Power/Ground, 48 pins
Section 2.2.6 MISC
Note:
“Section 1.5.2 Pin Types” can be used for reference.
2.2.1
Pin Name
RXP[0:4]
Twisted Pair Interface
Pin#
126, 11, 24, 37, 41
Type
I/O,
Analog
I/O,
Analog
I/O,
Analog
I/O,
Analog
Descriptions
Twisted Pair Receive Input Positive.
RXN[0:4]
127, 12, 25, 38, 40
Twisted Pair Receive Input Negative.
TXP[0:4]
123, 8, 21, 34, 44
Twisted Pair Transmit Output Positive.
TXN[0:4]
124, 9, 22, 35, 43
Twisted Pair Transmit Output Negative.
2.2.2
Setting
ADMtek Inc.
2-2
Pin Name
GFCEN
Pin#
63
Type
I/O,
8mA
PU
Descriptions
Setting
GFCEN: Global Flow Control Enable.
At power-on-reset, latched as Full Duplex Flow control
setting
“1” to enable flow-control (default ), “0” to disable flow-
control.
Port4 FX/TX mode select. Internal pull down.
1: Port4 as FX port.
0: Port4 as TX port.
Setting
PHYAS0: Chip physical address for multiple chip application
on read EEPROM data. Internal pull down.
Power on reset value PHYAS0 combines with PHYAS1
PHYAS1 PHYAS0
0 0 Master(93C46)
If there is no EEPROM then user must use 93C66 timing to
write chip’s register.
If user put 93C46 with correct Signature then user writes
chip register by 93C46 timing.
P4FX
62
I
PD
PHYAS0
66
I/O
8mA
PD
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