
3
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V
Voltage at Any Input. . . . . . . . . . . . . . . . . . . . . . -0.3V to (V+ +0.3V)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
Maximum Junction Temperature
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
(Notes 2, 8)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CONVERTER SPECIFICATIONS V+ = 5V, TA = 25oC and fCLK = 640kHz, Unless Otherwise Specified
Total Unadjusted Error
ADC0803
VREF/2 Adjusted for Correct Full Scale Reading
-
±1/2
LSB
ADC0804
VREF/2 = 2.500V
-
±1LSB
VREF/2 Input Resistance
Input Resistance at Pin 9
1.0
1.3
-
k
Analog Input Voltage Range
(Note 3)
GND-0.05
-
(V+) + 0.05
V
DC Common-Mode Rejection
Over Analog Input Voltage Range
-
±1/16
±1/8
LSB
Power Supply Sensitivity
V+ = 5V
±10% Over Allowed Input Voltage
Range
-
±1/16
±1/8
LSB
CONVERTER SPECIFICATIONS V+ = 5V, 0oC to 70oC and fCLK = 640kHz, Unless Otherwise Specified
Total Unadjusted Error
ADC0803
VREF/2 Adjusted for Correct Full Scale Reading
-
±1/2
LSB
ADC0804
VREF/2 = 2.500V
-
±1LSB
VREF/2 Input Resistance
Input Resistance at Pin 9
1.0
1.3
-
k
Analog Input Voltage Range
(Note 3)
GND-0.05
-
(V+) + 0.05
V
DC Common-Mode Rejection
Over Analog Input Voltage Range
-
±1/8
±1/4
LSB
Power Supply Sensitivity
V+ = 5V
±10% Over Allowed Input Voltage
Range
-
±1/16
±1/8
LSB
AC TIMING SPECIFICATIONS V+ = 5V, and TA = 25oC, Unless Otherwise Specified
Clock Frequency, fCLK
V+ = 6V (Note 4)
100
640
1280
kHz
V+ = 5V
100
640
800
kHz
Clock Periods per Conversion (Note 5),
tCONV
62
-
73
Clocks/Conv
Conversion Rate In Free-Running Mode, CR INTR tied to WR with CS = 0V, fCLK = 640kHz
-
8888
Conv/s
Width of WR Input (Start Pulse Width),
tW(WR)I
CS = 0V (Note 6)
100
-
ns
Access Time (Delay from Falling Edge of
RD to Output Data Valid), tACC
CL = 100pF (Use Bus Driver IC for Larger CL)
-
135
200
ns
Three-State Control (Delay from Rising
Edge of RD to Hl-Z State), t1H, t0H
CL = 10pF, RL= 10K
(See Three-State Test Circuits)
-
125
250
ns
Delay from Falling Edge of WR to Reset of
INTR, tWI, tRI
-
300
450
ns
Input Capacitance of Logic Control Inputs,
CIN
-5
-
pF
Three-State Output Capacitance (Data
Buffers), COUT
-5
-
pF
ADC0803, ADC0804