參數(shù)資料
型號(hào)： AD9848KST
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： CCD Signal Processors with Integrated Timing Driver
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： PLASTIC, LQFP-48
文件頁數(shù)： 30/36頁
文件大?。?/td> 347K
代理商： AD9848KST
REV. 0
AD9848/AD9849
–30–
Optical Black Clamp
The optical black clamp loop is used to remove residual offsets in
the signal chain and to track low-frequency variations in the CCD’s
black level. During the optical black (shielded) pixel interval on
each line, the ADC output is compared with a fixed black level
reference, selected by the user in the Clamp Level Register. The
value can be programmed between 0 LSB and 63.75 LSB on the
AD9848, and between 0 LSB and 255 LSB on the AD9849. The
clamp level can be programmed with 8-bit resolution. The result-
ing error signal is filtered to reduce noise, and the correction value
is applied to the ADC input through a D/A converter. Normally,
the optical black clamp loop is turned on once per horizontal line,
but this loop can be updated more slowly to suit a particular
application. If external digital clamping is used during the post
processing, the AD9848/AD9849 optical black clamping may be
disabled using Bit D2 in the OPRMODE Register. When the loop
is disabled, the Clamp Level Register may still be used to provide
programmable offset adjustment.
The CLPOB pulse should be placed during the CCD’s optical
black pixels. It is recommended that the CLPOB pulse duration
be at least 20 pixels wide to minimize clamp noise. Shorter pulse-
widths may be used, but clamp noise may increase, and the ability
to track low-frequency variations in the black level will be reduced.
See the section on Horizontal Clamping and Blanking and also
the Applications Information section for timing examples.
A/D Converter
The AD9848/AD9849 uses high-performance 10-bit/12-bit
ADC architecture, optimized for high speed and low power.
Differential Nonlinearity (DNL) performance is typically better
than 0.5 LSB. The ADC uses a 2 V input range. Better noise
performance results from using a larger ADC full-scale range.
See TPC 1–TPC 4 for typical linearity and noise performance
plots for the AD9848/AD9849.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9848KSTRL 制造商:Analog Devices 功能描述:10 BIT 18 MSPS 3V AFE & T - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:10 BIT 18 MSPS 3V AFE & T - Tape and Reel
AD9849 制造商:AD 制造商全稱:Analog Devices 功能描述:CCD Signal Processors with Integrated Timing Driver
AD9849AKST 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V/3.3V/5V 48-Pin LQFP 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Trays 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MSPS SIGNAL PROCESSOR - Tape and Reel
AD9849AKSTRL 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V/3.3V/5V 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MSPS SIGNAL PROCESSOR - Tape and Reel
AD9849AKSTZ 功能描述:IC CCD SIGNAL PROC 12BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件
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