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參數(shù)資料
| 型號： | AD9848KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processors with Integrated Timing Driver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 11/36頁 |
| 文件大?。?/td> | 347K |
| 代理商： | AD9848KST |
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REV. 0
AD9848/AD9849
–11–
SYSTEM OVERVIEW
CCD
SERIAL
INTERFACE
DOUT
DIGITAL IMAGE
PROCESSING
ASIC
V-DRIVER
HD, VD
CLI
V1
–
V4, VSG1
–
VSG8, SUBCK
H1
–
H4, RG
CCDIN
AD9848/AD9849
INTEGRATED
AFE+TD
Figure 1a. Typical Application (Internal Mode)
CCD
SERIAL
INTERFACE
DOUT
DIGITAL IMAGE
PROCESSING
ASIC
V-DRIVER
HD, VD
CLI
V1
–
V4, VSG1
–
VSG8, SUBCK
H1
–
H4, RG
CCDIN
AD9848/AD9849
INTEGRATED
AFE+TD
PBLK
HBLK
CLPDM
CLPOB
Figure 1b. Typical Application (External Mode)
Figure 1a and 1b show the typical system application diagrams
for the AD9848/AD9849. The CCD output is processed by the
AD9848/AD9849’s AFE circuitry, which consists of a CDS,
PxGA
, VGA, black level clamp, and A/D converter. The digi-
tized pixel information is sent to the digital image processor
chip, where all post-processing and compression occurs. To
operate the CCD, CCD timing parameters are programmed
into the AD9848/AD9849 from the image processor, through
the 3-wire serial interface. From the system master clock, CLI,
provided by the image processor, the AD9848/AD9849 gener-
ates the high speed CCD clocks and all internal AFE clocks. All
AD9848/AD9849 clocks are synchronized with VD and HD.
Figure 1a shows the AD9848/AD9849 used in Internal mode,
in which all the horizontal pulses (CLPOB, CLPDM, PBLK,
and HBLK) are programmed and generated internally. Figure 1b
shows the AD9848/AD9849 operating in external mode, in
which the horizontal pulses are supplied externally by the
image processor.
The H-drivers for H1–H4 and RG are included in the AD9848/
AD9849, allowing these clocks to be directly connected to the
CCD. H-drive voltage of 5 V is supported in the AD9849.
Figure 2 shows the horizontal and vertical counter dimensions
for the AD9848/AD9849. All internal horizontal clocking is
programmed using these dimensions, to specify line and
pixel locations.
MAXIMUM FIELD DIMENSIONS
12-BIT HORIZONTAL = 4096 PIXELS MAX
12-BIT VERTICAL = 4096 LINES MAX
Figure 2. Vertical and Horizontal Counters
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PDF描述 |
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| AD9848 | CCD Signal Processors with Integrated Timing Driver |
| AD9849 | CCD Signal Processors with Integrated Timing Driver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9848KSTRL | 制造商:Analog Devices 功能描述:10 BIT 18 MSPS 3V AFE & T - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:10 BIT 18 MSPS 3V AFE & T - Tape and Reel |
| AD9849 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CCD Signal Processors with Integrated Timing Driver |
| AD9849AKST | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V/3.3V/5V 48-Pin LQFP 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Trays 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MSPS SIGNAL PROCESSOR - Tape and Reel |
| AD9849AKSTRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V/3.3V/5V 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MSPS SIGNAL PROCESSOR - Tape and Reel |
| AD9849AKSTZ | 功能描述:IC CCD SIGNAL PROC 12BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設(shè)備封裝:20-TSSOP 包裝:管件 |
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