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參數(shù)資料
| 型號： | AD9846AJSTZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD SIGNAL PROC 10BIT 48LQFP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | CCD 信號處理器，10 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
REV. 0
AD9846A
–11–
HD
NOTE: 0 = GAIN0, 1 = GAIN1, 2 = GAIN2
012012012...
...01201
VD
LINE n
LINE n+1
Figure 12. PxGA Mode 3 (3-Color) Frame/Line Gain Register Sequence
SHP
HD
5 PIXEL MIN
PxGA GAIN
GAIN1
VD
GAIN2
GAIN0
GAIN1
GAIN0
GAINX
GAIN0
GAINX
3ns MIN
5 PIXEL MIN
NOTES:
1. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES.
2. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 012012.
Figure 13. PxGA Mode 3 (3-Color) Detailed Timing
NOTE: 0 = GAIN0, 1 = GAIN1, 2 = GAIN2, 3 = GAIN3
LINE n
LINE n+1
012301230123...
...01230
01230123012...
VD
HD
Figure 14. PxGA Mode 4 (4-Color) Frame/Line Gain Register Sequence
SHP
HD
5 PIXEL MIN
PxGA GAIN
GAIN1
VD
GAIN2
GAIN0
GAIN1
GAIN0
GAINX
GAIN0
GAINX
3ns MIN
5 PIXEL MIN
NOTES:
1. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES.
2. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 01230123.
Figure 15. PxGA Mode 4 (4-Color) Detailed Timing
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| AD9847AKSTZRL | IC CCD SIGNAL PROC 10BIT 48-LQFP |
| AD9849AKSTZRL | IC CCD SIGNAL PROC 12BIT 48LQFP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9846-EB | 制造商:Analog Devices 功能描述:12 BIT 30 MHZ AFE NO PXGA - Bulk |
| AD9847 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver |
| AD9847AKCPZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9847AKCPZRL | 制造商:Analog Devices 功能描述:DISPLAY DRVR, 10-BIT 40MSPS CCD SGNL PROCESSOR W/ INTEGRATED - Tape and Reel |
| AD9847AKST | 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Trays |
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