參數(shù)資料
型號(hào)： AD9772AAST
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 14-Bit, 160 MSPS TxDAC+ with 2x Interpolation Filter
中文描述： PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, 14-BIT DAC, PQFP48
封裝： MS-026BBC, LQFP-48
文件頁(yè)數(shù)： 17/32頁(yè)
文件大?。?/td> 596K
代理商： AD9772AAST
REV. A
AD9772A
–17–
+1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO
AVDD
AD9772A
2k
0.1 F
ADDITIONAL
LOAD
OPTIONAL
EXTERNAL
REF BUFFER
2.7V TO 3.6V
Figure 15. Internal Reference Configuration
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external 1.2 V reference such as the
AD1580 may then be applied to REFIO as shown in Figure 16.
The external reference may provide either a fixed reference
voltage to enhance accuracy and drift performance or a varying
reference voltage for gain control. Note that the 0.1
μ
F compen-
sation capacitor is not required since the internal reference is
disabled, and the high input impedance of REFIO minimizes
any loading of the external reference.
+1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO
AVDD
AD9772A
AD1580
2.7V TO 3.6V
REFERENCE
CONTROL
AMPLIFIER
R
SET
I
REF
=
V
REFIO
/R
SET
10k
V
REFIO
Figure 16. External Reference Configuration
REFERENCE CONTROL AMPLIFIER
The AD9772A also contains an internal control amplifier that is
used to regulate the DAC
’
s full-scale output current, I
OUTFS
.
The control amplifier is configured as a V-I converter, as shown
in Figure 16, such that its current output, I
REF
, is determined by
the ratio of the V
REFIO
and an external resistor, R
SET
, as stated in
Equation 4. I
REF
is copied to the segmented current sources with
the proper scaling factor to set I
OUTFS
as stated in Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
OUTFS
over a 2 mA to 20 mA range by setting I
REF
between
62.5
μ
A and 625
μ
A. The wide adjustment span of I
OUTFS
provides several application benefits. The first benefit relates
directly to the power dissipation of the AD9772
’
s DAC, which
is proportional to I
OUTFS
(refer to the Power Dissipation sec-
tion). The second benefit relates to the 20 dB adjustment, which
is useful for system gain control purposes.
I
REF
can be controlled using the single-supply circuit shown in
Figure 17 for a fixed R
SET
. In this example, the internal refer-
ence is disabled, and the voltage of REFIO is varied over its
compliance range of 1.25 V to 0.10 V. REFIO can be driven
by a single-supply DAC or digital potentiometer, thus allowing
I
REF
to be digitally controlled for a fixed R
SET
. This particular
example shows the AD5220, an 8-bit serial input digital potenti-
ometer, along with the AD1580 voltage reference. Note, since
the input impedance of REFIO does interact and load the
digital potentiometer wiper to create a slight nonlinearity in the
programmable voltage divider ratio, a digital potentiometer with
10 k
or less of resistance is recommended.
+1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO
AVDD
AD9772A
AD1580
2.7V TO 3.6V
R
SET
10k
10k
AD5220
1.2V
Figure 17. Single-Supply Gain Control Circuit
ANALOG OUTPUTS
The AD9772A produces two complementary current outputs,
I
OUTA
and I
OUTB
, which may be configured for single-ended or
differential operation. I
OUTA
and I
OUTB
can be converted into
complementary single-ended voltage outputs, V
OUTA
and
V
OUTB
, via a load resistor, R
LOAD
, as described in the DAC
Transfer Function section, by Equations 5 through 8. The
differential voltage, V
DIFF
, existing between V
OUTA
and V
OUTB
,
can also be converted to a single-ended voltage via a transformer
or differential amplifier configuration.
Figure 18 shows the equivalent analog output circuit of the
AD9772A, consisting of a parallel combination of PMOS differ-
ential current switches associated with each segmented current
source. The output impedance of I
OUTA
and I
OUTB
is determined
by the equivalent parallel combination of the PMOS switches
and is typically 200
k
in parallel with 3 pF. Due to the nature
of a PMOS device, the output impedance is also slightly dependent
on the output voltage (i.e., V
OUTA
and V
OUTB
) and, to a lesser
extent, the analog supply voltage, AVDD, and full-scale current,
I
OUTFS
. Although the output impedance
’
s signal dependency can
be a source of dc nonlinearity and ac linearity (i.e., distortion), its
effects can be limited if certain precautions are noted.
I
OUTA
and I
OUTB
also have a negative and positive voltage compli-
ance range. The negative output compliance range of
–
1.0 V is
set by the breakdown limits of the CMOS process. Operation
beyond this maximum limit may result in a breakdown of the
output stage and affect the reliability of the AD9772A. The positive
output compliance range is slightly dependent on the full-scale
output current, I
OUTFS
. Operation beyond the positive compliance
range will induce clipping of the output signal, which severely
degrades the AD9772A
’
s linearity and distortion performance.
AD9772A
AVDD
I
OUTA
R
LOAD
R
LOAD
I
OUTB
Figure 18. Equivalent Analog Output Circuit
相關(guān)PDF資料
PDF描述
AD9772 14-Bit,150 MSPS T×DAC+TM with 2× Interpolation Filter(單電源,過(guò)采樣,14位D/A轉(zhuǎn)換器)
AD9773 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter
AD9773AST 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter
AD9773EB 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter
AD9774AS 14-Bit, 32 MSPS TxDAC⑩ with 4x Interpolation Filters
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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