參數(shù)資料
型號: AD9633BCPZRL7-105
廠商: Analog Devices Inc
文件頁數(shù): 30/40頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SRL 105MSPS 48LFCSP
標(biāo)準(zhǔn)包裝: 750
位數(shù): 12
采樣率(每秒): 105M
數(shù)據(jù)接口: LVDS,串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 473mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-WQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個差分,雙極
AD9633
Data Sheet
Rev. 0 | Page 36 of 40
Addr
(Hex)
Parameter
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Comments
0x21
Serial output
data control
(global)
LVDS
output
LSB
first
SDR/DDR one-lane/two-lane,
bitwise/bytewise[6:4]
000 = SDR two-lane, bitwise
001 = SDR two-lane, bytewise
010 = DDR two-lane, bitwise
011 = DDR two-lane, bytewise
100 = DDR one-lane
Open
Select 2×
frame
Serial output
number of bits
10 = 12 bits
11 = 10 bits
0x32
Serial stream
control. Default
causes MSB first
and the native
bit stream.
0x22
Serial channel
status (local)
Open
Channel
output
reset
Channel
power-
down
0x00
Used to power
down individual
sections of a
converter.
0x100
Resolution/
sample rate
override
Open
Resolution/
sample rate
override
enable
Resolution
10 = 12 bits
11 = 10 bits
Open
Sample rate
000 = 20 MSPS
001 = 40 MSPS
010 = 50 MSPS
011 = 65 MSPS
100 = 80 MSPS
101 = 105 MSPS
110 = 125 MSPS
0x00
Resolution/
sample rate
override
(requires
transfer
register,
0xFF).
0x101
User I/O Control 2
Open
SDIO
pull-
down
0x00
Disables SDIO
pull-down.
0x102
User I/O Control 3
Open
VCM
power-
down
Open
0x00
VCM control.
0x109
Sync
Open
Sync
next
only
Enable
sync
0x00
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