參數(shù)資料
型號(hào)： AD9398KSTZ-100
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/44頁(yè)
文件大?。?/td> 0K
描述： IC INTERFACE 100MHZ HDMI 100LQFP
標(biāo)準(zhǔn)包裝： 90
應(yīng)用： 視頻
接口： HDMI
電源電壓： 3.15 V ~ 3.47 V
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 管件
安裝類型： 表面貼裝
配用： AD9398/PCBZ-ND - BOARD EVALUATION FOR AD9398
AD9398
Rev. 0 | Page 29 of 44
0x33—Bit[7] Macrovision Detect Mode
0 = standard definition. 1 = progressive scan mode.
0x33—Bit[6] Macrovision Settings Override
This defines whether preset values are used for the MV line
counts and pulse widths or the values stored in I2C registers.
0 = use hard-coded settings for line counts and pulse widths.
1 = use I2C values for these settings.
0x33—Bits[5:0] Macrovision Line Count End
Set the end line for Macrovision detection. Along with
Register 0x32, Bits[5:0], they define the region where MV
pulses are expected to occur. The power-up default is Line 21.
0x34—Bits[7:6] Macrovision Pulse Limit Select
Set the number of pulses required in the last three lines (SD
mode only). If there is not at least this number of MV pulses,
the engine stops. These 2 bits define the following pulse counts:
00 = 6
01 = 4
10 = 5 (default)
11 = 7
0x34—Bit[5] Low Frequency Mode
Sets whether the audio PLL is in low frequency mode or
not. Low frequency mode should only be set for pixel clocks
< 80 MHz.
0x34—Bit[4] Low Frequency Override
Allows the previous bit to be used to set low frequency mode
rather than the internal auto-detect.
0x34—Bit[3] Up Conversion Mode
0 = repeat Cb/Cr values. 1 = interpolate Cb/Cr values.
0x34—Bit[2] CbCr Filter Enable
Enables the FIR filter for 4:2:2 CbCr output.
COLOR SPACE CONVERSION
The default power-up values for the color space converter
coefficients (R0x35 through R0x4C) are set for ATSC RGB-to-
YCbCr conversion. They are completely programmable for
other conversions.
0x34—Bit[1] Color Space Converter Enable
This bit enables the color space converter. 0 = disable color
space converter. 1 = enable color space converter. The power-up
default setting is 0.
0x35—Bits[6:5] Color Space Converter Mode
These two bits set the fixed-point position of the CSC
coefficients, including the A4, B4, and C4 offsets.
Table 17. CSC Fixed Point Converter Mode
Select
Result
00
±1.0, 4096 to +4095
01
±2.0, 8192 to +8190
1×
±4.0, 16384 to +16380
0x35—Bits[4:0] Color Space Conversion Coefficient A1
MSBs
These 5 bits form the 5 MSBs of the Color Space Conversion
Coefficient A1. This combined with the 8 LSBs of the following
register form a 13-bit, twos complement coefficient that is user
programmable. The equation takes the form of:
ROUT = (A1 × RIN) + (A2 × GIN) + (A3 × BIN) + A4
GOUT = (B1 × RIN) + (B2 × GIN) + (B3 × BIN) + B4
BOUT = (C1 × RIN) + (C2 × GIN) + (C3 × BIN) + C4
The default value for the 13-bit A1 coefficient is 0x0C52.
0x36—Bits[7:0] Color Space Conversion Coefficient A1
LSBs
See the Register 0x35[4:0] section.
0x37—Bits[4:0] CSC A2 MSBs
These five bits form the 5 MSBs of the Color Space Conversion
Coefficient A2. Combined with the 8 LSBs of the following
register, they form a 13-bit, twos complement coefficient that is
user programmable. The equation takes the form of:
ROUT = (A1 × RIN) + (A2 × GIN) + (A3 × BIN) + A4
GOUT = (B1 × RIN) + (B2 × GIN) + (B3 × BIN) + B4
BOUT = (C1 × RIN) + (C2 × GIN) + (C3 × BIN) + C4
The default value for the 13-bit A2 coefficient is 0x0800.
0x38—Bits[7:0] CSC A2 LSBs
See the Register 0x37 section.
0x39—Bits[4:0] CSC A3 MSBs
The default value for the 13-bit A3 is 0x0000.
0x3A—Bits[7:0] CSC A3 LSBs
0x3B—Bits[4:0] CSC A4 MSBs
The default value for the 13-bit A4 is 0x19D7.
0x3C—Bits[7:0] CSC A4 LSBs
0x3D—Bits[4:0] CSC B1 MSBs
The default value for the 13-bit B1 is 0x1C54.
0x3E—Bits[7:0] CSC B1 LSBs
0x3F—Bits[4:0] CSC B2 MSB
The default value for the 13-bit B2 is 0x0800.
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