
AD8191A
Rev. 0 | Page 10 of 28
TA = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input
swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, pattern = PRBS 27 1, data rate = 1.65 Gbps, unless
otherwise noted.
REFERENCE EYE DIAGRAM AT TP1
DIGITAL
PATTERN
GENERATOR
SMA COAX CABLE
HDMI CABLE
TP1
TP2
TP3
AD8191A
EVALUATION
BOARD
SERIAL DATA
ANALYZER
07
01
3-
0
09
Figure 9. Test Circuit Diagram for Tx Eye Diagrams
0.125UI/DIV AT 1.65Gbps
250
mV
/D
IV
07
01
3-
0
10
Figure 10. Tx Eye Diagram at TP2, PE = 2 dB
0.125UI/DIV AT 1.65Gbps
250
mV
/D
IV
07
01
3-
0
11
Figure 11. Tx Eye Diagram at TP2, PE = 6 dB
0.125UI/DIV AT 1.65Gbps
250
mV
/D
IV
07
01
3-
0
12
Figure 12. Tx Eye Diagram at TP3, PE = 2 dB (Cable = 2 meters, 30 AWG)
0.125UI/DIV AT 1.65Gbps
250
mV
/D
IV
07
01
3-
0
13
Figure 13. Tx Diagram at TP3, PE = 6 dB (Cable = 10 meters, 28 AWG)