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| 型號(hào)： | AD8158ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 9/36頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX QUAD 2X1 100LFCSP |
| 產(chǎn)品變化通告： | AD8158 Change of Default Settings 13/Aug/2009 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XStream™ |
| 功能： | 多路復(fù)用器/多路分解器 |
| 電路： | 4 x 2:1 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.6 V ~ 3.6 V |
| 電流 - 電源： | 780mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 100-VFQFN 裸露焊盤(pán)，CSP |
| 供應(yīng)商設(shè)備封裝： | 100ピンLFCSP-VQ（12x12） |
| 包裝： | 托盤(pán) |
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AD8158
Rev. B | Page 17 of 36
Table 6. Features Available Through Toggle Pin or Serial Control
Feature
Pin Control
Serial Control
Switch Features
BICAST
One pin
One bit
A/B Lane Select
Two pins
Two bits
Loopback
Three pins
Three bits
Speed Select (SEL4G)
One pin
One bit
Rx Features
EQ Levels
Four settings
10 settings
N/P Swap
Not available
Available
Squelch
Enabled
Three bits
Tx Features
Programmable Output Levels
±400 mV diff fixed1
±200 mV diff/±300 mV diff/±400 mV diff/±600 mV diff
PE Levels
Two settings
>7 settings
1 ±400 mV diff indicates a 400 mV amplitude signal measured between two differential nodes. The voltage swing at differential I/O pins is described in this data sheet
both in terms of the differentially measured voltage range (±400 mV diff, for example) and in terms of peak-to-peak differential swing, denoted as mV p-p diff. An
output level setting of ±400 mV diff delivers a differential peak-to-peak output voltage of 800 mV p-p diff.
THE SWITCH
(MUX/DEMUX/UNICAST/BICAST/LOOPBACK)
The mux and demux functions of the AD8158 can be controlled
either with the toggle pins or through the register map. The
multiplexer path switches received data from Input Port A or
Input Port B to Output Port C. The SEL[3:0] pins allow switching
lanes independently. The demultiplexer path switches received
data from Input Port C to Output Port A, Output Port B, or (if
bicast mode is enabled) to both Output Port A and Output Port B.
Table 7. Port Selection and Configuration with All
Loopbacks Disabled
BICAST
SELx
Output
Port A
Output
Port B
Output
Port C
0
Ix_C[3:0]
Idle
Ix_A[3:0]
0
1
Idle
Ix_C[3:0]
Ix_B[3:0]
1
0
Ix_C[3:0]
Ix_A[3:0]
1
Ix_C[3:0]
Ix_B[3:0]
When the device is in unicast mode, the output lanes on either
Port A or Port B are in an idle state. In the idle state, the
transmitter output current is set to 0, and the P and N sides of
the lane are pulled up to the output termination voltage through
the on-chip termination resistors. To save power, the unused
receiver automatically disables.
The AD8158 supports port-level loopback, illustrated in Figure 36.
The loopback control pins override the lane select (SEL[3:0])
and bicast control (BICAST) pin settings at the port level. In serial
control mode, Bits [6:4] of Register 0x01 control loopback and
are equivalent to asserting Pin LB_A, Pin LB_B, and Pin LB_C.
Table 8 summarizes the different loopback configurations.
The loopback feature is useful for system debug, self-test, and
initialization, allowing system ASICs to compare Tx and Rx
data sent over a single bidirectional link. Loopback can also be
used to configure the device as a four- to 12-lane receive
equalizer or backplane redriver.
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| AD8158-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Bulk |
| AD8158XCPZ | 制造商:Analog Devices 功能描述:QUAD-LANE 6.5GBPS 2:1 MUX / 1:2 DEMUX SWITCH 100-PIN LFCSP - Bulk |
| AD8159 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:3.2 Gbps Quad Buffer Mux/Demux |
| AD8159ASVZ | 功能描述:IC MUX/DEMUX QUAD BUFF 100TQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:XStream™ 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:825 (CN2011-ZH PDF) 其它名稱(chēng):568-1854-1 |
| AD8159-EVAL-AC | 制造商:Analog Devices 功能描述:EVAL KIT FOR AC-COUPLED EVAL BD - Bulk |
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