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參數(shù)資料
| 型號： | AD8158ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX QUAD 2X1 100LFCSP |
| 產(chǎn)品變化通告： | AD8158 Change of Default Settings 13/Aug/2009 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XStream™ |
| 功能： | 多路復(fù)用器/多路分解器 |
| 電路： | 4 x 2:1 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.6 V ~ 3.6 V |
| 電流 - 電源： | 780mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 100ピンLFCSP-VQ（12x12） |
| 包裝： | 托盤 |
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AD8158
Rev. B | Page 16 of 36
THEORY OF OPERATION
The AD8158 is a buffered, asynchronous, three-port transceiver
that allows 2:1 multiplexing and 1:2 demultiplexing among its
ports. The 1:2 demux path supports bicast operation, allowing
the AD8158 to operate as a port replicator as well as a redundancy
switch. The AD8158 offers loopback on each lane, allowing
the part to be configured as a twelve-lane equalizer or redriver
with FFE.
MUX
TXC
RXA
RXB
DEMUX
RXC
TXA
TXB
0
66
46
-0
23
Figure 35. Mux/Demux Paths, Port A to Port C
The part offers extensively programmable transmit output levels
and preemphasis settings as well as squelch or full disable. The
receivers integrate a programmable, multizero transfer function
for aggressive equalization and a programmable loss-of-signal
feature. The AD8158 provides a balanced, high speed switch
core that maintains low lane-to-lane skew while preserving
edge rates.
The I/O on-chip termination resistors are tied to user-settable
supplies for increased flexibility. The AD8158 supports a wide
primary supply range; VCC can be set from 1.8 V to 3.3 V. These
features, together with programmable transmitter output levels,
allow for a wide range of dc- and ac-coupled I/O configurations.
The AD8158 supports several control and configuration modes,
shown in Table 5. The pin control mode offers access to a subset
of the total feature list but allows for a much simplified control
scheme. Table 6 compares the features in all control modes.
The primary advantage of using the serial control interface is
that it allows finer resolution in setting receive equalization,
transmitter preemphasis, loss-of-signal (LOS) behavior, and
output levels.
By default, the AD8158 starts in the pin control mode. Strobing
the RESETb pin sets all on-chip registers to their default values
and uses pins to configure switch connectivity, PE, and EQ
levels. In mixed mode, switch connectivity is still controlled
through the SEL[3:0], LB_[A:C], and BICAST pins. The user
can override PE and EQ settings in mixed mode. In serial
mode, all functions are accessed through registers and the
control pin inputs are ignored, except RESETb.
The AD8158 register set is controlled through a 2-wire I2C
interface. The AD8158 acts only as an I2C slave device. The 7-bit
slave address for the AD8158 I2C interface contains the static
value b1010 for the upper four bits. The lower three bits are
controlled by the input pins, I2C_A[2:0].
Table 5. Control Interface Mode Register
Address
Default
Register Name
Bit
Bit Name
Functionality Description
0x0F
0x00
Control
interface mode
7:2
Reserved
Set to 0.
1:0
Mode[1:0]
00: toggle pin control. Asynchronous control through toggle pins only.
10: mixed control. Switch configuration via toggle pins, register-based
control through the I2C serial interface.
11: serial control. Register-based control through the I2C serial interface.
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| AD8158-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Bulk |
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| AD8159ASVZ | 功能描述:IC MUX/DEMUX QUAD BUFF 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:XStream™ 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD8159-EVAL-AC | 制造商:Analog Devices 功能描述:EVAL KIT FOR AC-COUPLED EVAL BD - Bulk |
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