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| 型號(hào)： | AD7723BSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SIGMA-DELTA 44MQFP |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1.2M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)差分，單極；1 個(gè)差分，雙極 |
| 配用： | EVAL-AD7723CBZ-ND - BOARD EVALUATION FOR AD7723 |
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AD7723
Rev. C | Page 14 of 32
TERMINOLOGY
Signal-to-Noise Ratio (SNR)
SNR is the measured signal-to-noise ratio at the output of the
ADC. The signal is the rms magnitude of the fundamental.
Noise is the rms sum of all of the nonfundamental signals up to
half the output data rate (FO/2), excluding dc. The ADC is
evaluated by applying a low noise, low distortion sine wave
signal to the input pins. By generating a fast fourier transform
(FFT) plot, the SNR data can then be obtained from the output
spectrum.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the harmonics to the rms
value of the fundamental. THD is defined as
1
2
6
2
5
2
4
2
3
2
V
THD
+
= 20log
where V1 is the rms amplitude of the fundamental, and V2, V3,
V4
, V5, and V6 are the rms amplitudes of the second through
sixth harmonics. The THD is also derived from the FFT plot of
the ADC output spectrum.
Spurious-Free Dynamic Range (SFDR)
Defined as the difference, in dB, between the peak spurious or
harmonic component in the ADC output spectrum (up to FO/2
and excluding dc) and the rms value of the fundamental.
Normally, the value of this specification is determined by the
largest harmonic in the output spectrum of the FFT. For input
signals whose second harmonics occur in the stop-band region
of the digital filter, the spur in the noise floor limits the SFDR.
Pass-Band Ripple
The frequency response variation of the AD7723 in the defined
pass-band frequency range.
Pass-Band Frequency
The frequency up to which the frequency response variation is
within the pass-band ripple specification.
Cutoff Frequency
The frequency below which the AD7723’s frequency response
will not have more than 3 dB of attenuation.
Stop-Band Frequency
The frequency above which the AD7723’s frequency response
will be within its stop-band attenuation.
Stop-Band Attenuation
The AD7723’s frequency response will not have less than 90 dB
of attenuation in the stated frequency band.
Integral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The
endpoints of the transfer function are minus full scale, a point
0.5 LSB below the first code transition (100 . . . 00 to 100 . . . 01
in bipolar mode, 000 . . . 00 to 000 . . . 01 in unipolar mode),
and plus full scale, a point 0.5 LSB above the last code transition
(011 . . . 10 to 011 . . . 11 in bipolar mode, 111 . . . 10 to 111 . . .
11 in unipolar mode). The error is expressed in LSBs.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between two adjacent codes in the ADC.
Common-Mode Rejection Ratio
The ability of a device to reject the effect of a voltage applied to
both input terminals simultaneously—often through variation
of a ground level—is specified as a common–mode rejection
ratio. CMRR is the ratio of gain for the differential signal to the
gain for the common-mode signal.
Unipolar Offset Error
Unipolar offset error is the deviation of the first code transition
(10 . . . 000 to 10 . . . 001) from the ideal differential voltage
(VIN(+) – VIN(–)+ 0.5 LSB) when operating in the unipolar
mode.
Bipolar Offset Error
This is the deviation of the midscale transition code (111 . . . 11
to 000 . . . 00) from the ideal differential voltage (VIN(+) –
VIN(–) – 0.5 LSB) when operating in the bipolar mode.
Gain Error
The first code transition should occur at an analog value LSB
above –full scale. The last transition should occur for an analog
value 1 LSB below the nominal full scale. Gain error is the
deviation of the actual difference between first and last code
transitions and the ideal difference between first and last code
transitions.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7723BSZ-REEL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC |
| AD7724 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual CMOS Modulators |
| AD7724ACPZ | 功能描述:IC MOD SIGMA-DELTA DUAL 制造商:analog devices inc. 系列:* 零件狀態(tài):上次購買時(shí)間 標(biāo)準(zhǔn)包裝:1 |
| AD7724ACPZ-REEL | 功能描述:IC MOD SIGMA-DELTA DUAL 制造商:analog devices inc. 系列:* 零件狀態(tài):上次購買時(shí)間 標(biāo)準(zhǔn)包裝:1 |
| AD7724AST | 制造商:Analog Devices 功能描述:ADC Dual Delta-Sigma 30Msps 15-bit Serial 48-Pin LQFP |
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