參數(shù)資料
型號： AD7723BSZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 15/32頁
文件大?。?/td> 0K
描述： IC ADC 16BIT SIGMA-DELTA 44MQFP
標(biāo)準(zhǔn)包裝： 800
位數(shù)： 16
采樣率（每秒）： 1.2M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-QFP
供應(yīng)商設(shè)備封裝： 44-MQFP（10x10）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個差分，單極；1 個差分，雙極
配用： EVAL-AD7723CBZ-ND - BOARD EVALUATION FOR AD7723
AD7723
Rev. C | Page 22 of 32
1M
XTAL
CLKIN
AD7723
01186-043
In all cases, since the REF2 voltage connects to the analog
modulator, a 220 nF and 10 nF capacitor must connect directly
from REF2 to AGND. The external capacitor provides the
charge required for the dynamic load presented at the REF2 pin
10nF
220nF
A
B
A
4pF
REF2
SWITCHED-CAP
DAC REFERENCED
CLKIN
A
B
A
B
Φ
ΦΦ
Φ
01186-041
23
Figure 43. Crystal Oscillator Connection
When an external clock source is being used, the internal
oscillator circuit can be disabled by tying XTAL_OFF high. A
low phase noise clock should be used to generate the ADC
sampling clock because sampling clock jitter effectively
modulates the input signal and raises the noise floor. The
sampling clock generator should be isolated from noisy digital
circuits, grounded, and heavily decoupled to the analog ground
plane.
Figure 41. REF2 Equivalent Input Circuit
The AD780 is ideal to use as an external reference with the
AD7723. Figure 42 shows a suggested connection diagram.
Grounding Pin 8 on the AD780 selects the 3 V output mode.
The sampling clock generator should be referenced to the
analog ground in a split ground system. However, this is not
always possible because of system constraints. In many
applications, the sampling clock must be derived from a higher
frequency multipurpose system clock that is generated on the
digital ground plane. If the clock signal is passed between its
origin on a digital ground plane to the AD7723 on the analog
ground plane, the ground noise between the two planes adds
directly to the clock and produces excess jitter. The jitter can
cause degradation in the signal-to-noise ratio and also produce
unwanted harmonics. This can be remedied somewhat by
transmitting the sampling signal as a differential one, using
either a small RF transformer or a high speed differential driver
and a receiver such as PECL. In either case, the original master
system clock should be generated from a low phase noise crystal
oscillator.
1
2
3
4
AD780
AD7723
REF2
REF1
5V
1
F
22nF
220nF
10nF
22
F
NC
+VIN
TEMP
GND
O/P
SELECT
NC
VOUT
TRIM
2.5V
NC = NO CONNECT
8
7
6
5
01186-042
Figure 42. External Reference Circuit Connection
CLOCK GENERATION
The AD7723 contains an oscillator circuit to allow a crystal or
an external clock signal to generate the master clock for the
ADC. The connection diagram for use with a crystal is shown
in Figure 43. Consult the manufacturer’s recommendation for
the load capacitors. To enable the oscillator circuit on board the
AD7723, XTAL_OFF should be tied low.
相關(guān)PDF資料
PDF描述
AD7725BSZ IC ADC 16BIT PROG 44MQFP
AD7730BN IC ADC TRANSDUCER BRIDGE 24-DIP
AD7731BN IC ADC 24BIT SIGMA-DELTA 24-DIP
AD7732BRU IC ADC 24BIT 2-CH 28-TSSOP
AD7734BRU IC ADC 24BIT 4-CH 28-TSSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7723BSZ-REEL1 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC
AD7724 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual CMOS Modulators
AD7724ACPZ 功能描述:IC MOD SIGMA-DELTA DUAL 制造商:analog devices inc. 系列:* 零件狀態(tài):上次購買時間 標(biāo)準(zhǔn)包裝:1
AD7724ACPZ-REEL 功能描述:IC MOD SIGMA-DELTA DUAL 制造商:analog devices inc. 系列:* 零件狀態(tài):上次購買時間 標(biāo)準(zhǔn)包裝:1
AD7724AST 制造商:Analog Devices 功能描述:ADC Dual Delta-Sigma 30Msps 15-bit Serial 48-Pin LQFP
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*