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AD73322L
Rev. A | Page 33 of 48
The AD73322L’s ADC inputs are biased about the internal
reference level (REFCAP level); therefore, it may be necessary
to bias external signals to this level using the buffered REFOUT
level as the reference. This is applicable in either dc-coupled or
ac-coupled configurations. In the case of dc coupling, the signal
(biased to REFOUT) may be applied directly to the inputs
(using amplifier bypass), as shown in
Figure 33, or it may be
conditioned in an external op amp where it can also be biased
to the reference level using the buffered REFOUT signal, as
shown in
Figure 34, or it is possible to connect inputs directly to
the AD73322L’s input op amps as shown in
Figure 35.CONTINUOUS
TIME
LOW-PASS
FILTER
VREF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
AD73322L
+6/–15dB
PGA
0/38dB
PGA
GAIN
±1
REFOUT
REFCAP
REFERENCE
VREF
50k
50k
50k
50k
0.1
F
00691-035
100pF
Figure 35. Analog Input (DC Coupled) Using Internal Amplifiers
In the case of ac coupling, a capacitor is used to couple the
signal to the input of the ADC. The ADC input must be biased
to the internal reference (REFCAP) level which is done by
connecting the input to the REFOUT pin through a 10 k
CONTINUOUS
TIME
LOW-PASS
FILTER
VREF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
AD73322L
+6/–15dB
PGA
0/38dB
PGA
GAIN
±1
REFOUT
REFCAP
REFERENCE
VREF
100
100
0.1
F
0.1
F
0.1
F
00691-036
0.047
F
0.047
F
10k
10k
Figure 36. Analog Input (AC-Coupled) Differential
If the ADC is being connected in single-ended mode, the
AD73322L should be programmed for single-ended mode
using the SEEN and INV bits of CRF and the inputs connected
as shown in
Figure 37. When operated in single-ended input
mode, the AD73322L can multiplex one of the two inputs to the
ADC input.
CONTINUOUS
TIME
LOW-PASS
FILTER
VREF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
AD73322L
+6/–15dB
PGA
0/38dB
PGA
GAIN
±1
REFOUT
REFCAP
REFERENCE
VREF
100
0.1
F
0.1
F
0.047
F
10k
00691-037
Figure 37. Analog Input (AC-Coupled) Single-Ended
If best performance is required from a single-ended source, it is
possible to configure the AD73322L’s input amplifiers as a
single-ended-to-differential converter, as shown in
Figure 38.CONTINUOUS
TIME
LOW-PASS
FILTER
VREF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
AD73322L
+6/–15dB
PGA
0/38dB
PGA
GAIN
±1
REFOUT
REFCAP
REFERENCE
VREF
50k
50k
50k
50k
0.1
F
100pF
00691-038
Figure 38. Single-Ended-to-Differential Conversion on Analog Input