參數(shù)資料
型號(hào): AD7352YRUZ-500RL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/21頁(yè)
文件大?。?/td> 0K
描述: IC ADC DUAL 12BIT 3MSPS 16TSSOP
設(shè)計(jì)資源: DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7352 (CN0040)
標(biāo)準(zhǔn)包裝: 500
位數(shù): 12
采樣率(每秒): 3M
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 45mW
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,雙極
Differential Input, Dual, Simultaneous
Sampling, 3 MSPS, 12-Bit, SAR ADC
Rev. A
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responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
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Fax: 781.461.3113
2008–2011 Analog Devices, Inc. All rights reserved.
FEATURES
Dual 12-bit SAR ADC
Simultaneous sampling
Throughput rate: 3 MSPS per channel
Specified for VDD at 2.5 V
No conversion latency
Power dissipation: 26 mW at 3 MSPS
On-chip reference: 2.048 V ± 0.25%, 6 ppm/°C
Dual conversion with read
High speed serial interface: SPI-/QSPI-/MICROWIRE-/ DSP-
compatible
40°C to +125°C operation
Available in a 16-lead TSSOP
APPLICATIONS
Data acquisition systems
Motion control
I and Q demodulation
FUNCTIONAL BLOCK DIAGRAM
SCLK
AD7352
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
CONTROL
LOGIC
SDATAA
CS
SDATAB
DGND
REFGND
AGND
VDRIVE
VDD
AGND
T/H
BUF
REF
VINA+
VINA–
REFA
VINB+
VINB–
REFB
07
04
4-
00
1
Figure 1.
GENERAL DESCRIPTION
The AD73521 is a dual, 12-bit, high speed, low power, successive
approximation ADC that operates from a single 2.5 V power
supply and features throughput rates up to 3 MSPS. The part
contains two ADCs, each preceded by a low noise, wide band-
width track-and-hold circuit that can handle input frequencies
in excess of 110 MHz.
The conversion process and data acquisition use standard
control inputs allowing for easy interfacing to microprocessors
or DSPs. The input signal is sampled on the falling edge of CS;
and a conversion is also initiated at this point. The conversion
time is determined by the SCLK frequency.
The AD7352 uses advanced design techniques to achieve very
low power dissipation at high throughput rates. With a 2.5 V
supply and a 3 MSPS throughput rate, the part consumes 10 mA
typically. The part also offers a flexible power/throughput rate
management options.
The analog input range for the part is the differential common-
mode ±VREF/2. The AD7352 has an on-chip 2.048 V reference
that can be overdriven when an external reference is preferred.
The AD7352 is available in a 16-lead thin shrink small outline
package (TSSOP).
PRODUCT HIGHLIGHTS
1.
Two Complete ADC Functions.
These functions allow simultaneous sampling and conversion
of two channels. The conversion result of both channels is
simultaneously available on separate data lines or in suc-
cession on one data line if only one serial port is available.
2.
High Throughput With Low Power Consumption.
The AD7352 offers a 3 MSPS throughput rate with 26 mW
power consumption.
3.
No Conversion Latency.
The AD7352 features two standard successive approx-
imation ADCs with accurate control of the sampling
instant via a CS input and, once off, conversion control.
Table 1. Related Devices
Generic
Resolution
Throughput
Analog Input
12-bit
5 MSPS
Differential
14-bit
4.2MSPS
Differential
12-bit
2 MSPS
Differential/single ended
12-bit
1 MSPS
Single-ended
12-bit
1 MSPS
Single-ended bipolar
14-bit
1 MSPS
Single-ended bipolar
1 Protected by U.S. Patent No. 6,681,332.
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