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參數(shù)資料
| 型號： | AD6641BCPZRL7-500 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/28頁 |
| 文件大小： | 0K |
| 描述： | IC IF RCVR 11BIT 200MSPS 56LFCSP |
| 標準包裝： | 750 |
| 應用： | 無線通信系統(tǒng) |
| 接口： | CMOS，LVDS，并聯(lián)， 串行，SPI |
| 電源電壓： | 1.8 V ~ 2 V |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
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AD6641
Rev. 0 | Page 10 of 28
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Rating
Electrical
AVDD to AGND
0.3 V to +2.0 V
DRVDD to DRGND
0.3 V to +2.0 V
AGND to DRGND
0.3 V to +0.3 V
AVDD to DRVDD
2.0 V to +2.0 V
SPI_VDDIO to AVDD
2.0 V to +2.0 V
SPI_VDDIO to DRVDD
2.0 V to +2.0 V
PD[5:0]± to DRGND
0.3 V to DRVDD + 0.2 V
PCLK± to DRGND
0.3 V to DRVDD + 0.2 V
PDOR± to DRGND
0.3 V to DRVDD + 0.2 V
FULL to DRGND
0.3 V to DRVDD + 0.2 V
CLK± to AGND
0.3 V to AVDD + 0.2 V
FILL± to AGND
0.3 V to DRVDD + 0.2 V
DUMP to AGND
0.3 V to DRVDD + 0.2 V
EMPTY to AGND
0.3 V to DRVDD + 0.2 V
VIN± to AGND
0.3 V to AVDD + 0.2 V
VREF to AGND
0.3 V to AVDD + 0.2 V
CML to AGND
0.3 V to AVDD + 0.2 V
CSB to DRGND
0.3 V to SPI_VDDIO + 0.3 V
SP_SCLK, SP_SDFS to AGND
0.3 V to SPI_VDDIO + 0.3 V
SDIO to DRGND
0.3 V to SPI_VDDIO + 0.3 V
SP_SDO to DRGND
0.3 V to SPI_VDDIO + 0.3 V
Environmental
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +85°C
Lead Temperature
(Soldering, 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
The exposed pad must be soldered to the ground plane for
the LFCSP package. Soldering the exposed pad to the PCB
increases the reliability of the solder joints, maximizing the
thermal capability of the package.
Table 7.
Package Type
θJA
θJC
Unit
56-Lead LFCSP_VQ (CP-56-1)
23.7
1.7
°C/W
Typical θJA and θJC are specified for a 4-layer board in still air.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, metal in direct contact with the package leads from
metal traces, through holes, ground, and power planes reduces
the θJA.
ESD CAUTION
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