參數(shù)資料
型號: AD6641BCPZRL7-500
廠商: Analog Devices Inc
文件頁數(shù): 15/28頁
文件大?。?/td> 0K
描述: IC IF RCVR 11BIT 200MSPS 56LFCSP
標(biāo)準(zhǔn)包裝: 750
應(yīng)用: 無線通信系統(tǒng)
接口: CMOS,LVDS,并聯(lián), 串行,SPI
電源電壓: 1.8 V ~ 2 V
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 56-LFCSP-VQ(8x8)
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
AD6641
Rev. 0 | Page 22 of 28
Addr.
(Hex)
Parameter Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Default
Notes/
Comments
0x105
Settle Count0
[7:0]
0
LSBs settling
time given to
ADC before
initiating fill.
0x106
Settle Count1
[7:0]
0
MSBs settling
time given to
ADC before
initiating fill.
0x107
Dump control
[7:3] = reserved
0 =
slave
1 =
master
Readback mode:
00 = off
01 = parallel
10 = SPORT
11 = reserved
0
Customer
drives
SP_SCLK,
SP_SDFS in
slave mode.
0x10A
FIFO status
[7:3] = reserved
Over-
range
Empty
Full
0
0x10B
FIFO Dump Data0
[7:0] = LSBs
0
LSBs readback
data.
0x10C
FIFO Dump Data1
[7:4] = reserved
[3:0] = MSBs
0
MSBs upper
four bits
readback
data.
0x10F
Read Offset Data0
[7:0] = LSBs
0
LSBs offset to
RAM, allowing
subsegments
of data cap-
ture to be
read.
0x110
Read Offset Data1
[7:6] = reserved
[5:0] = MSBs
0
MSB’s offset.
0x111
PPORT control
[7:5] = reserved
Divide ratio = 2 × (bit word):
00100 = divide by 8 (default)
01111 = divide by 30
1xxxx = divide by 32
0x04
CMOS parallel
port divide
rate.
0x112
SPORT control
[7:5] = reserved
Divide ratio= 2 × (bit word):
00100 = divide by 8 (default)
01111 = divide by 30
1xxxx = divide by 32
0x04
Serial port
divide rate.
0x13A
FIFO test BIST
[7:5] = reserved
Sets the BIST mode for the FIFO:
1xxx = reserved
0111 = reserved
0110 = 12'hFFF (1 LSB)
0101 = 12'h001 (+1 LSB)
0100 = PN data
0011 = checkerboard (12'hAAA, 12'h555,
12'hAAA, … )
0010 = checkerboard (12'h555, 12'hAAA,
12'h555, … )
0001 = decrementing ramp
0000 = incrementing ramp
FIFO
BIST
enable
0
1 X = don’t care.
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