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參數(shù)資料
| 型號： | AD5757ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT QUAD IOUT 64LFCSP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 設(shè)置時間： | 15µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | * |
| 采樣率（每秒）： | * |
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AD5757
Data Sheet
Rev. D | Page 30 of 44
DAC Control Register
The DAC control register is used to configure each DAC channel. The DAC control register options are shown in Table 19 and Table 20.
Table 19. Programming DAC Control Register
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
INT_ENABLE
CLR_EN
OUTEN
RSET
DC_DC
R2
R1
R0
1 X = don’t care.
Table 20. DAC Control Register Functions
Bit
Description
INT_ENABLE
Powers up the dc-to-dc converter, DAC, and internal amplifiers for the selected channel. Does not enable the output. Can
only be done on a per channel basis. It is recommended to set this bit and allow a >200 s delay before enabling the
output because this results in a reduced output enable glitch. Plots of this glitch can be found in Figure 25.
CLR_EN
Per channel clear enable bit. Selects if this channel clears when the CLEAR pin is activated.
CLR_EN = 1, channel clears when the part is cleared.
CLR_EN = 0, channel does not clear when the part is cleared (default).
OUTEN
Enables/disables the selected output channel.
OUTEN = 1, enables the channel.
OUTEN = 0, disables the channel (default).
RSET
Selects an internal or external current sense resistor for the selected DAC channel.
RSET = 0, selects the external resistor (default).
RSET = 1, selects the internal resistor.
DC_DC
Powers the dc-to-dc converter on the selected channel.
DC_DC = 1, power up the dc-to-dc converter.
DC_DC = 0, power down the dc-to-dc converter (default).
This allows per channel dc-to-dc converter power-up/power-down. To power down the dc-to-dc converter, the OUTEN and
INT_ENABLE bits must also be set to 0.
All dc-to-dc converters can also be powered up simultaneously using the DCDC_ALL bit in the main control register.
R2, R1, R0
Selects the output range to be enabled.
R2
R1
R0
Output Range Selected
1
0
4 mA to 20 mA current range
1
0
1
0 mA to 20 mA current range
1
0
0 mA to 24 mA current range
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD5757X | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
| AD575JD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575JN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
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