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參數(shù)資料
| 型號： | AD5757ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT QUAD IOUT 64LFCSP |
| 標準包裝： | 750 |
| 設置時間： | 15µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | * |
| 采樣率（每秒）： | * |
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Data Sheet
AD5757
Rev. D | Page 25 of 44
REGISTERS
Table 6 shows an overview of the registers for the AD5757.
Table 6. Data, Control, and Readback Registers for the AD5757
Register
Description
Data
DAC Data Register (×4)
Used to write a DAC code to each DAC channel. AD5757 data bits = D15 to D0. There are four DAC
data registers, one per DAC channel.
Gain Register (×4)
Used to program gain trim, on a per channel basis. AD5757 data bits = D15 to D0. There are four gain
registers, one per DAC channel.
Offset Register (×4)
Used to program offset trim, on a per channel basis. AD5757 data bits = D15 to D0. There are four
offset registers, one per DAC channel.
Clear Code Register (×4)
Used to program clear code on a per channel basis. AD5757 data bits = D15 to D0. There are four clear
code registers, one per DAC channel.
Control
Main Control Register
Used to configure the part for main operation. Sets functions such as status readback during write,
enables output on all channels simultaneously, powers on all dc-to-dc converter blocks
simultaneously, and enables and sets conditions of the watchdog timer. See the Device Features
section for more details.
Software Register
Has three functions. Used to perform a reset, to toggle the user bit and, as part of the watchdog timer
feature, to verify correct data communication operation.
Slew Rate Control Register (×4)
Used to program the slew rate of the output. There are four slew rate control registers, one per
channel.
DAC Control Register (×4)
These registers are used to control the following:
Set the output range, for example, 4 mA to 20 mA.
Set whether an internal/external sense resistor is used.
Enable/disable a channel for CLEAR.
Enable/disable internal circuitry on a per channel basis.
Enable/disable output on a per channel basis.
Power on dc-to-dc converters on a per channel basis.
There are four DAC control registers, one per DAC channel.
DC-to-DC Control Register
Use to set the dc-to-dc control parameters. Can control dc-to-dc maximum voltage, phase, and
frequency.
Readback
Status Register
This contains any fault information, as well as a user toggle bit.
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相關代理商/技術參數(shù) |
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|---|---|
| AD5757X | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
| AD575JD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575JN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
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