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參數(shù)資料
| 型號(hào)： | AD571JD |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 8/8頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT MONO W/CLK 18-CDIP |
| 產(chǎn)品變化通告： | Redesign Change 26/Apr/2012 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 25k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 800mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 18-CDIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 18-CDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極；1 個(gè)單端，雙極 |
AD571
REV.
–8–
zero, blanking the previously active port at the same time. Sub-
sequently, this second device can be read by the microprocessor,
and so-forth. The status lines are wire-ored in 2 groups and
connected to the two remaining control pins. This allows a con-
version status check to be made after a convert command, if
necessary. The ADCs are divided into two groups to minimize
the loading effect of the internal pull-up resistors on the
DATA
READY buffers.
with the 2 control bits (which act as outputs), are used to con-
trol the 8 AD571s. When a control line is in the “1” or high
state, the ADC will be automatically blanked. That is, its out-
puts will be in the inactive open state. If a single control line is
switched low, its ADC will convert and the outputs will auto-
matically go active when the conversion is complete. The result
can then be read from the two peripheral ports; when the next
conversion is desired, a different control line can be switched to
B
OUTLINE DIMENSIONS
18
1
9
10
0.310 (7.87)
0.220 (5.59)
PIN 1
0.098 (2.49) MAX
0.005 (0.13) MIN
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.070 (1.78)
0.030 (0.76)
0.960 (24.38) MAX
0.100
(2.54)
BSC
0.150
(3.81)
MIN
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 16. 18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
(D-18)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD571JD
0°C to +70°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD571SD
–55°C to +125°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD571SD/883B
–55°C to +125°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
5962-8680202VA
–55°C to +125°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
REVISION HISTORY
4/12—Rev. A to Rev. B
Changes to Temperature Coefficients Full-Scale Calibration
Parameter ...........................................................................................2
Changes to V+ Operating Current Parameter ..............................2
Updated Outline Dimensions..........................................................8
Added Ordering Guide and Revision History Section ................8
2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D
10739-0-4/12(B)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD571JD/+ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD571K | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit A/D Converter |
| AD571KD | 制造商:Analog Devices 功能描述:ADC Single SAR 10-bit Parallel 18-Pin SBCDIP |
| AD571KD/+ | 制造商:Analog Devices 功能描述:ADC SGL SAR 10-BIT PARALLEL 18PIN SBCDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:IC, MONO 10-BIT A/D CONV - Bulk |
| AD571S | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit A/D Converter |
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