參數(shù)資料
型號: AD571JD
廠商: Analog Devices Inc
文件頁數(shù): 5/8頁
文件大?。?/td> 0K
描述: IC ADC 10BIT MONO W/CLK 18-CDIP
產(chǎn)品變化通告: Redesign Change 26/Apr/2012
標準包裝: 1
位數(shù): 10
采樣率(每秒): 25k
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 800mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 18-CDIP(0.300",7.62mm)
供應商設備封裝: 18-CDIP
包裝: 管件
輸入數(shù)目和類型: 1 個單端,單極;1 個單端,雙極
AD571
REV.
–5–
NOTE: During a conversion transient currents from the analog
common terminal will disturb the offset voltage. Capacitive de-
coupling should not be used around the offset network. These
transients will settle as appropriate during a conversion. Capaci-
tive decoupling will “pump up” and fail to settle resulting in
conversion errors. Power supply decoupling which returns to
analog signal common should go to the signal input side of the
resistive offset network.
0000000100
0000000011
0000000010
0000000001
0000000000
0V 10mV
30mV
50mV
INPUT VOLTAGE
OUTPUT
CODE
NORMAL CHARACTERISTICS
REFERRED TO ANALOG COMMON
0000000100
0000000011
0000000010
0000000001
0000000000
0V 10mV
30mV
50mV
INPUT VOLTAGE
OUTPUT
CODE
OFFSET CHARACTERISTICS WITH
2.7
Ω IN SERIES WITH ANALOG COMMON
Figure 8. AD571 Transfer Curve—Unipolar Operation
(Approximate Bit Weights Shown for Illustration, Nominal
Bit Weights
9.766 mV)
BIPOLAR CONNECTION
To obtain the bipolar –5 V to +5 V range with an offset binary
output code the bipolar offset control pin is left open.
A –5.0 volt signal will give a 10-bit code of 0000000000; an in-
put of 0.00 volts results in an output code of 1000000000;
+4.99 volts at the input yields 1111111111. The nominal trans-
fer curve is shown in Figure 9.
INPUT VOLTAGE – mV
0
–30
–20
–10
0
+10
+20
+30
10000 00000
01111 11111
01111 11110
10000 00010
10000 00001
OUTPUT
CODE
Figure 9. AD571 Transfer Curve—Bipolar Operation
ZERO OFFSET
The apparent zero point of the AD571 can be adjusted by
inserting an offset voltage between the analog common of the
device and the actual signal return or signal common. Figure 7
illustrates two methods of providing this offset. Figure 7a shows
how the converter zero may be offset by up to
±3 bits to correct
the device initial offset and/or input signal offsets. As shown, the
circuit gives approximately symmetrical adjustment in unipolar
mode. In bipolar mode R2 should be omitted to obtain a sym-
metrical range.
AD571
AIN
ACOM
INPUT
SIGNAL
R1
10
Ω
R2
7.5k
Ω
R3
4.7k
Ω
R4
10k
Ω
SIGNAL COMMON
+15V
ZERO OFFSET ADJ
±3 BIT RANGE
–15V
Figure 7a.
AD571
AIN
ACOM
INPUT
SIGNAL
SIGNAL COMMON
R1
2.7
Ω OR
5
Ω POT
1/2 BIT ZERO OFFSET
Figure 7b.
Figure 8 shows the nominal transfer curve near zero for an
AD571 in unipolar mode. The code transitions are at the edges
of the nominal bit weights. In some applications it will be pref-
erable to offset the code transitions so that they fall between the
nominal bit weights, as shown in the offset characteristics. This
offset can easily be accomplished as shown in Figure 7b. At bal-
ance (after a conversion) approximately 2 mA flows into the
analog common terminal. A 2.7
Ω resistor in series with this
terminal will result in approximately the desired 1/2 bit offset of
the transfer characteristics. The nominal 2 mA analog common
current is not closely controlled in production. If high accuracy
is required, a 5
Ω potentiometer (connected as a rheostat) can
be used as R1. Additional negative offset range may be obtained
by using larger values of R1. Of course, if the zero transition
point is changed, the full-scale transition point will also move.
Thus, if an offset of 1/2 LSB is introduced, full-scale trimming
as described on previous page should be done with an analog in-
put of 9.985 volts.
B
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