參數(shù)資料
型號： AD1846JP
廠商： ANALOG DEVICES INC
元件分類： 消費家電
英文描述： Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec
中文描述： SPECIALTY CONSUMER CIRCUIT, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 11/28頁
文件大?。?/td> 277K
代理商： AD1846JP
AD1846
REV. A
–11–
Index
Register Name
0
1
2
3
4
5
6
7
8
9
Left Input Control
Right Input Control
Left Aux #1 Input Control
Right Aux #1 Input Control
Left Aux #2 Input Control
Right Aux #2 Input Control
Left Output Control
Right Output Control
Clock and Data Format
Interface Configuration
Pin Control
T est and Initialization
Miscellaneous Information
Digital Mix
Upper Base Count
Lower Base Count
10
11
12
13
14
15
CONT ROL RE GIST E RS
Control Register Architecture
T he AD1846 SoundPort Stereo Codec accepts both data and
control information through its byte-wide parallel port. Indirect
addressing minimizes the number of external pins required to
access all 21 of its byte-wide internal registers. Only two exter-
nal address pins, ADR1:0, are required to accomplish all data
and control transfers. T hese pins select one of five direct regis-
ters. (ADR1:0 = 3 addresses two registers, depending on
whether the transfer is a playback or a capture.)
ADR1:0
Register Name
0
1
2
3
Index Address Register
Indexed Data Register
Status Register
PIO Data Registers
Figure 4. Direct Register Map
A write to or a read from the Indexed Data Register will access
the indirect register which is indexed by the value most recently
written to the Index Address Register. T he Status Register and
the PIO Data Register are always accessible directly, without in-
dexing. T he 16 indirect registers are indexed in Figure 5.
Direct R egisters:
AD R1:0
0
1
2
3
3
D ata 7
INIT
IX D 7
C U/L
C D 7
PD 7
D ata 6
MCE
IX D 6
CL/R
C D 6
PD 6
D ata 5
T RD
IX D 5
CRDY
C D 5
PD 5
D ata 4
res
IX D 4
SOUR
C D 4
PD 4
D ata 3
IX A3
IX D 3
PU/L
C D 3
PD 3
D ata 2
IX A2
IX D 2
PL /R
C D 2
PD 2
D ata 1
IX A1
IX D 1
PRDY
C D 1
PD 1
D ata 0
IX A0
IX D 0
INT
C D 0
PD 0
Indirect R egisters:
IX A3:0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Data 7
L SS1
RSS1
L MX 1
RMX 1
L MX 2
RMX 2
L DM
RDM
res
C PIO
X C T L 1
COR
res
DMA5
UB7
L B7
Data 6
L SS0
RSS0
res
res
res
res
res
res
F MT
PPIO
X C T L 0
PUR
res
DMA4
UB6
L B6
Data 5
L MGE
RMGE
res
res
res
res
L DA5
RDA5
C /L
res
res
ACI
res
DMA3
UB5
L B5
Data 4
res
res
L X 1A4
RX 1A4
L X 2A4
RX 2A4
L DA4
RDA4
S/M
res
res
DRS
res
DMA2
UB4
L B4
Data 3
L IG3
RIG3
L X 1A3
RX 1A3
L X 2A3
RX 2A3
L DA3
RDA3
C F S2
ACAL
res
ORR1
ID 3
DMA1
UB3
L B3
Data 2
L IG2
RIG2
L X 1A2
RX 1A2
L X 2A2
RX 2A2
L DA2
RDA2
C F S1
SD C
res
ORR0
ID 2
DMA0
UB2
L B2
Data 1
L IG1
RIG1
L X 1A1
RX 1A1
L X 2A1
RX 2A1
L DA1
RDA1
C F S0
C EN
IE N
ORL1
ID 1
res
UB1
L B1
Data 0
L IG0
RIG0
L X 1A0
RX 1A0
L X 2A0
RX 2A0
L DA0
RDA0
CSS
PE N
res
ORL0
ID 0
DME
UB0
L B0
Figure 6. Register Summary
Note that the only sticky bit in any of the AD1846 control registers is the interrupt (INT ) bit. All other bits change with every
sample period.
Figure 5. Indirect Register Map
A detailed map of all direct and indirect register contents is
summarized for reference as follows:
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相關代理商/技術參數(shù)
參數(shù)描述
AD1846JP-REEL 制造商:Analog Devices 功能描述:
AD1847 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial-Port 16-Bit SoundPort Stereo Codec
AD1847JP 制造商:Rochester Electronics LLC 功能描述:- Bulk
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AD1847JST 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial-Port 16-Bit SoundPort Stereo Codec
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