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參數(shù)資料
| 型號： | AD10465BZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC DUAL 14BIT 68-CLCC |
| 標準包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 3.9W |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-CLCC |
| 供應(yīng)商設(shè)備封裝： | 68-CLCC（24.13x24.13） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 6 個單端，雙極 |
AD10465
Rev. A | Page 8 of 24
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
02
35
6-
00
2
10
11
12
13
14
15
16
17
18
19
20
22
23
24
25
26
21
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
1
2
3
4
5
6
7
8
9
6867 6665 646362 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
AD10465
AGNDB
REF_B
DRBOUT
AGNDB
D12A
DG
NDA
E
N
CO
DE
A
E
N
CO
DE
A
DV
CC
D11A
D
13A
(
M
S
BA)
AGNDA
DRAOUT
AVEE
D0A (LSBA)
D1A
D2A
D3A
D4A
D5A
AGNDB
ENCODEB
DVCC
D0B
(
L
S
B
)
D1B
D2B
D3B
AG
ND
A
AG
ND
A
AG
ND
A
AG
ND
A
RE
F
_A
AV
EE
AV
CC
AG
NDB
AG
NDB
AG
NDB
SH
IEL
D
A
IN
B1
A
IN
B2
A
IN
B3
A
IN
A1
A
IN
A2
A
IN
A3
D4B
D5B
D6B
D7B
D8B
DG
NDB
D6A
D7A
D8A
D9A
D10A
DGNDA
D13B (MSBB)
D12B
D11B
D10B
D9B
DGNDB
AVCC
Figure 7. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
SHIELD
Internal Ground Shield Between Channels.
2, 4, 5, 9 to11
AGNDA
A Channel Analog Ground. A ground and B ground should be connected as close to the device
as possible.
3
REF_A
A Channel Internal Voltage Reference.
6
AINA1
Analog Input for A Side ADC (Nominally ±0.5 V).
7
AINA2
Analog Input for A Side ADC (Nominally ±1.0 V).
8
AINA3
Analog Input for A Side ADC (Nominally ±2.0 V).
12
DRAOUT
Data Ready A Output.
13
AVEE
Analog Negative Supply Voltage (Nominally 5.0 V or 5.2 V).
14
AVCC
Analog Positive Supply Voltage (Nominally 5.0 V).
26, 27
DGNDA
A Channel Digital Ground.
15 to 25, 31 to 33
D0A to D13A
Digital Outputs for ADC A. D0A (LSBA).
28
ENCODEA
Complement of ENCODE.
29
ENCODEA
Data Conversion Initiated on Rising Edge of ENCODE Input.
30
DVCC
Digital Positive Supply Voltage (Nominally 5.0 V or 3.3 V).
43, 44
DGNDB
B Channel Digital Ground.
34 to 42, 45 to 49
D0B to D13B
Digital Outputs for ADC B. D0B (LSBB).
53, 54, 57 to 61, 65, 68
AGNDB
B Channel Analog Ground. A ground and B ground should be connected as close to the device
as possible.
50
DVCC
Digital Positive Supply Voltage (Nominally 5.0 V or 3.3 V).
51
ENCODEB
Data conversion initiated on rising edge of ENCODE input.
52
ENCODEB
Complement of ENCODEB.
55
DRBOUT
Data Ready B Output.
56
REF_B
B Channel Internal Voltage Reference.
62
AINB1
Analog Input for B Side ADC (Nominally ±0.5 V).
63
AINB2
Analog Input for B Side ADC (Nominally ±1.0 V).
64
AINB3
Analog Input for B Side ADC (Nominally ±2.0 V).
66
AVCC
Analog Positive Supply Voltage (Nominally 5.0 V).
67
AVEE
Analog Negative Supply Voltage (Nominally 5.0 V or 5.2 V).
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