參數(shù)資料
型號(hào): A1440A-VQG100I
廠商: Microsemi SoC
文件頁(yè)數(shù): 18/90頁(yè)
文件大小: 0K
描述: IC FPGA 4K GATES 100-VQFP
產(chǎn)品變化通告: A1440A Family Discontinuation 24/Jan/2012
標(biāo)準(zhǔn)包裝: 90
系列: ACT™ 3
LAB/CLB數(shù): 564
輸入/輸出數(shù): 83
門(mén)數(shù): 4000
電源電壓: 4.5 V ~ 5.5 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-VQFP(14x14)
Accelerator Series FPGAs – ACT 3 Family
R e visio n 3
2 - 17
Figure 2-11 Output Buffers
Figure 2-12 AC Test Loads
Figure 2-13 Input Buffer Delays
To AC test loads (shown below)
PAD
D
E
TRIBUFF
In
VCC
GND
50%
Out
VOL
VOH
1.5 V
tDHS,
50%
1.5 V
tDHS
En
VCC
GND
50%
Out
VOL
1.5 V
tENZHS,
50%
10%
tENHSZ
En
VCC
GND
50%
Out
GND
VOH
1.5 V
tENZHS,
50%
90%
tENHSZ
VCC
Load 1
(Used to measure propagation delay)
Load 2
(Used to measure rising/falling edges)
35 pF
To the output under test
VCC
GND
35 pF
To the output under test
R to VCCfor t
PLZ / tPZL
R to GND for t
PHZ / tPZH
R = 1 k
Ω
PAD
Y
INBUF
In
3V
0V
1.5 V
Out
GND
VCC
50%
tINY
1.5 V
50%
tINY
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