參數(shù)資料
型號(hào): A1440A-VQG100I
廠商: Microsemi SoC
文件頁(yè)數(shù): 16/90頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 4K GATES 100-VQFP
產(chǎn)品變化通告: A1440A Family Discontinuation 24/Jan/2012
標(biāo)準(zhǔn)包裝: 90
系列: ACT™ 3
LAB/CLB數(shù): 564
輸入/輸出數(shù): 83
門(mén)數(shù): 4000
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-VQFP(14x14)
Accelerator Series FPGAs – ACT 3 Family
R e visio n 3
2 - 15
Determining Average Switching Frequency
To determine the switching frequency for a design, you must have a detailed understanding of the data
input values to the circuit. The following guidelines are meant to represent worst-case scenarios so that
they can be generally used to predict the upper limits of power dissipation. These guidelines are as
follows:
Table 2-13 Guidelines for Predicting Power Dissipation
Data
Value
Logic Modules (m)
80% of modules
Inputs switching (n)
# inputs/4
Outputs switching (p)
# output/4
First routed array clock loads (q1)
40% of sequential modules
Second routed array clock loads (q2)
40% of sequential modules
Load capacitance (CL)
35 pF
Average logic module switching rate (fm)
F/10
Average input switching rate (fn)
F/5
Average output switching rate (fp)
F/10
Average first routed array clock rate (fq1)
F/2
Average second routed array clock rate (fq2)
F/2
Average dedicated array clock rate (fs1)
F
Average dedicated I/O
clock rate (fs2)
F
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