參數(shù)資料
型號： 9S12B128DGV1
英文描述： 9S12B128 Device Guide
中文描述： 9S12B128設備指南
文件頁數(shù)： 71/128頁
文件大?。?/td> 1823K
代理商： 9S12B128DGV1
Device User Guide —9S12B128DGV1/D V01.11
71
6.5 HCS12 Background Debug (BDM) Block Description
Consult the BDM Block Guide for information on the HCS12 Background Debug module.
6.5.1 Device-specific information
When the BDM Block Guide refers to alternate clock this is equivalent to Oscillator Clock.
6.6 HCS12 Breakpoint (BKP) Block Description
Consult the BKP Block Guide for information on the HCS12 Breakpoint module.
Section 7 Voltage Regulator (VREG3V3) Block Description
Consult the VREG3V3 Block User Guide for information about the dual output linear voltage regulator.
VREGEN is accessible externally.
Section 8 Clock and Reset Generator (CRG) Block
Description
Consult the CRG Block User Guide for information about the Clock and Reset Generator module.
8.1 Device-specific information
The Low Voltage Reset feature of the CRG is available on this device.
NOTE:
If the voltage regulator is shut downed by connecting VREGEN to the
corresponding ground pin then the LVRF flag in the CRG Flags Register
(CRGFLG) is undefined.
Section 9 Oscillator (OSC) Block Description
Consult the OSC Block User Guide for information about the Oscillator module.
9.1 Device-specific information
The XCLKS input signal is active low (see
2.2.10 PE7 / NOACC / XCLKS — Port E I/O Pin 7
).
Section 10 Standard Timer (TIM) Block Description
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相關代理商/技術參數(shù)
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9S12C128DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MC9S12C Family Device User Guide
9S12D32DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DGDJ64DGV1 Device Guide. also covers 9S12D64. 9S12A64. 9S12D32. and 9S12A32 devices
9S12DJ64DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DJ64DG Device Guide. also covers 9S12D64. 9S12A64. 9S12D32 and 9S12A32 devices
9S12DP256BDGV1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Automotive applications
9S12DP256BDGV2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices
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