參數(shù)資料
型號: 950812YGT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-56
文件頁數(shù): 27/30頁
文件大小: 227K
代理商: 950812YGT
IDTTM Frequency Generator with 200MHz Differential CPU Clocks
0542J—01/25/10
ICS950812
Frequency Generator with 200MHz Differential CPU Clocks
6
Table 3
PCI_STOP# I
2C Control Table-Byte 0, Bit 3
Note: When this Byte 0, Bit 3 is low (0), all PCI clocks are stopped.
Table 4
CPUCLKT/C (2:0) Outputs I
2C Control Table
Note: Individual CPUCLK outputs are controlled by Byte 1, Bit 3, 4, and 5.
Table 5
PCICLK_F (2:0) Outputs I
2C Control Table
Note: Individual PCICLK outputs are controlled by Byte 3, Bit 3, 4, and 5.
Table 6
3V66 (5:2)/66MHz_OUT(2:0)/66MHz_IN I
2C Control Table
Note: Activating Byte 5, Bit 5 will allow CPU_STOP# to control stop of pins 21, 22, 23, and 24.
CPU_STOP#
(Pin 53)
Byte 5
Bit 5
3V66 (5:2) (Driven)
66MHZ_OUT(2:0)/66MHZ_IN (Buffered)
01
10
1`
1
Byte 0, Bit 3 Read Bit
(Internal Status)
0
1
PCI_STOP#
(Pin 34)
CPU_STOP#
(Pin 53)
Byte 1
Bit 3, 4, 5
Byte 0 Bit 3
Write Bit
00
CPUCLKT/C (2:0) Outputs
00
Stop
01
Running
10
Running
11
Running
PCI_STOP#
(Pin 34)
Byte 3
Bit 3, 4, 5
PCICLK (2:0) Outputs
00
Stop
01
Running
10
Running
11
Running
00
01
Running
Stopped
10
11
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