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參數(shù)資料
| 型號： | 935270057557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 5/52頁 |
| 文件大?。?/td> | 680K |
| 代理商： | 935270057557 |
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Philips Semiconductors
SC16C754
Quad UART with 64-byte FIFO
Product data
Rev. 02 — 14 March 2003
13 of 49
9397 750 11192
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Registers DLL, DLH, SPR, Xon1, Xon2, Xoff1, Xoff2 are not reset by the top-level reset signal
RESET, i.e., they hold their initialization values during reset.
Table 5 summarizes the state of registers after reset.
Table 4:
Register reset functions
Register
Reset control
Reset state
Interrupt enable register
RESET
All bits cleared.
Interrupt identication register
RESET
Bit 0 is set. All other bits cleared.
FIFO control register
RESET
All bits cleared.
Line control register
RESET
Reset to 00011101 (1D hex).
Modem control register
RESET
All bits cleared.
Line status register
RESET
Bits 5 and 6 set. All other bits cleared.
Modem status register
RESET
Bits 0-3 cleared. Bits 4-7 input signals.
Enhanced feature register
RESET
All bits cleared.
Receiver holding register
RESET
Pointer logic cleared.
Transmitter holding register
RESET
Pointer logic cleared.
Transmission control register
RESET
All bits cleared.
Trigger level register
RESET
All bits cleared.
Table 5:
Signal RESET functions
Signal
Reset control
Reset state
TX
RESET
high
RTS
RESET
high
DTR
RESET
high
RXRDY
RESET
high
TXRDY
RESET
low
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