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參數(shù)資料
| 型號： | 935270057557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 19/52頁 |
| 文件大?。?/td> | 680K |
| 代理商： | 935270057557 |
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Philips Semiconductors
SC16C754
Quad UART with 64-byte FIFO
Product data
Rev. 02 — 14 March 2003
26 of 49
9397 750 11192
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.6 Modem control register (MCR)
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem. Table 14 shows modem control register bit settings.
[1]
MCR[7:5] can only be modied when EFR[4] is set, i.e., EFR[4] is a write enable.
Table 14:
Modem Control Register bits description
Bit
Symbol
Description
7
MCR[7] [1]
Clock select.
Logic 0 = Divide-by-1 clock input.
Logic 1 = Divide-by-4 clock input.
6
MCR[6] [1]
TCR and TLR enable.
Logic 0 = no action.
Logic 1 = Enable access to the TCR and TLR registers.
5
MCR[5] [1]
Xon Any.
Logic 0 = Disable Xon Any function.
Logic 1 = Enable Xon Any function.
4
MCR[4]
Enable loop-back.
Logic 0 = Normal operating mode.
Logic 1 = Enable local loop-back mode (internal). In this mode the
MCR[3:0] signals are looped back into MSR[7:4] and the TX output
is looped back to the RX input internally.
3
MCR[3]
IRQ enable OP.
Logic0=Forces INTA-INTB outputs to the 3-State mode and OP
output to HIGH state.
Logic1=Forces the INTA-INTB outputs to the active state and OP
output to LOW state. In loop-back mode, controls MSR[7].
2
MCR[2]
FIFO Ready enable.
Logic 0 = Disable the FIFO Rdy register.
Logic 1 = Enable the FIFO Rdy register.
In loop-back mode, controls MSR[6].
1
MCR[1]
RTS
Logic 0 = Force RTS output to inactive (HIGH).
Logic 1 = Force RTS output to active (LOW).
In loop-back mode, controls MSR[4]. If Auto-RTS is enabled, the
RTS output is controlled by hardware ow control.
0
MCR[0]
DTR
Logic 0 = Force DTR output to inactive (HIGH).
Logic 1 = Force DTR output to active (LOW).
In loop-back mode, controls MSR[5].
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