參數(shù)資料
型號(hào)： 935268625518
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù)： 46/82頁
文件大?。?/td> 1965K
代理商： 935268625518
Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
50 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Test circuit: see Figure 38.
[2]
Excluding the rst transition from Idle state.
[3]
Characterized only, not tested. Limits guaranteed by design.
VCRS
output signal crossover voltage
-
2.0
V
High-speed mode
tHSR
high-speed differential rise
time
with captive cable
500
-
ps
tHSF
high-speed differential
fall time
with captive cable
500
-
ps
Data source timing
Full-speed mode
tFEOPT
source EOP width
[3] 160
-
175
ns
tFDEOP
source differential data-to-EOP
transition skew
2-
+5ns
Receiver timing
Full-speed mode
tJR1
receiver data jitter tolerance to
next transition
18.5
-
+18.5
ns
tJR2
receiver data jitter tolerance for
paired transitions
9-
+9ns
tFEOPR
receiver SE0 width
accepted as EOP;
--ns
tFST
width of SE0 during differential
transition
rejected as EOP;
[3] --14
ns
Table 73:
Dynamic characteristics: analog I/O pins (D
+, D)[1]…continued
VCC = 4.0 to 5.5 V; VGND =0V; Tamb = 40 to +85 °C; CL = 50 pF; RPU = 1.5 k on D+ to VTERM.; unless otherwise specied.
Symbol
Parameter
Conditions
Min.
Typ
Max
Unit
TPERIOD is the bit duration corresponding with the USB data rate.
Full-speed timing symbols have a subscript prex ‘F’, low-speed timings a prex ‘L’.
Fig 6.
Source differential data-to-EOP transition skew and EOP width.
MGR776
TPERIOD
differential
data lines
crossover point
differential data to
SE0/EOP skew
N
× TPERIOD + tDEOP
source EOP width: tEOPT
receiver EOP width: tEOPR
crossover point
extended
+3.3 V
0 V
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