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參數(shù)資料
| 型號： | 935264533557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | SOT-317, MQFP-100 |
| 文件頁數(shù)： | 43/43頁 |
| 文件大?。?/td> | 254K |
| 代理商： | 935264533557 |
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1999 March 01
9
Philips Semiconductors
Product specication
Single chip DVB-C channel receiver
VES1820X
SYMBOL
PIN NUMBER
TYPE
DESCRIPTION
CMCAP
85
I
This pin is connected to a tap point on an internal resistor divider
used to create CMO and CMI. An external capacitor of value 0.1
f
should be connected between this point and ground to provide good
power
supply
rejection
from
the
positive
supply
at
higher
frequencies.
RBIAS
82
I
An external resistor of value 3.3k
should be connected between
this pin and ground to provide good accurate bias currents for the
analog circuits on the ADC.
VREF
88
O
This is the output of an on-chip resistor divider. An external capacitor
of value 0.1
f should be connected between this point and ground to
provide good power supply rejection from the positive supply at
higher frequencies. Reference voltages VREFP and VREFM are
derived from the voltage on VREF.
VREFP
87
O
This is a positive voltage reference for the A/D converter. It is derived
from the voltage on pin VREF through an on-chip fully-differential
amplifier. The voltage on this pin is nominally equal to CMO + 0.25
volts.
VREFM
86
O
This is the negative voltage reference for the A/D converter. It is
derived from the voltage on pin VREF through an on-chip fully-
differential amplifier. The voltage on this pin is nominally equal to
CMO- 0.25 volts.
CMO
84
O
This pin provides the common-mode out voltage for the analog
circuits on the ADC. It is the buffered version of a voltage derived
from an on-chip resistor devider, and has a nominal value of 0.5 x
VD3.
CMI
83
O
This pin provides the common-mode in voltage for the analog circuits
on the ADC. It is the buffered version of a voltage derived from an
on-chip resistor devider, and has a nominal value of 0.75 x VD3.
VD1
81
I
Power supply input for the digital switching circuitry (3.3 typ).
VS1
80
I
Ground return for the digital switching circuitry.
VD2
94
I
Power supply input for the analog clock drivers (3.3V typ).
VS2
93
I
Ground return for the analog clock drivers.
VD3
89
I
Power supply input for the analog circuits (3.3V typ).
VS3
90
I
Ground return for analog circuits.
VD4
95
I
Power supply input that connects to an n-well guard ring that
surrounds the ADC (3.3V typ).
DVCC
96
I
3.3V supply for the digital section of the PLL.
DGND
97
I
Ground connection for the digital section of the PLL.
PLLGND
98
I
Ground connection for the analog section of the PLL.
PLLVCC
99
I
3.3V supply for the analog section of the PLL.
PPLUS
100
I
P-well bias for the analog section of the PLL. Must be tied to 0V.
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