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參數(shù)資料
| 型號： | 935264530157 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | SOT-317, MQFP-100 |
| 文件頁數(shù)： | 21/43頁 |
| 文件大?。?/td> | 254K |
| 代理商： | 935264530157 |
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1999 March 01
28
Philips Semiconductors
Product specication
Single chip DVB-C channel receiver
VES1820X
POINT
Programmable Output INTerface.
POINT = 1 (default) allows to not provide the check bytes of the RS decoder but a
low level. In that case the output clock OCLK is also fixed to a DC level depending
on POCLK.
20.CPT_UNCOR
13
16
READ ONLY
CPTU[6:0]
7-bit counter which memorizes the number of uncorrectable packets found after a
master reset (hard or soft) or between two CLB_UNC writing. When the counter
reaches 7F
16
, it remains in this state until either a master reset or a CLB_UNC
occurs. Note that reading the CPTU[7:0] register does not reset the counter.
CPTU[7:0] is READ ONLY.
21. BER_LSB
14
16
READ ONLY
BER[7:0]
8 LSB of the BER[19:0] register.
22. BER_MID
15
16
READ ONLY
BER[15:8]
8 MID bit of the BER[19:0] register.
23. BER_MSB
16
READ ONLY
BER[19:16]
4 MSB bit of the BER[19:0] register.
BER[19:0] indicates the contents of the 20-bit error counter used in the
demodulator output Bit Error Rate measurement. These 20 bits must be
interpreted as a decimal number that must be multiplied by 10
-5
, 10-6 10-7 or 10-8
depending on the programmable value of PVBER, to directly obtain the BER at
demodulator output. For instance, if PVBER = 11 (in register RSCONF) and
VBER[19:0] =25
10
, then the BER at demodulator output is 2.5 X 10
-7
. (See
OUTPUT SIGNAL QUALITY MEASUREMENT (BER) on page 36). Reading of
BER[19:0] must occur in the following order : BER_LSB, BER_MID, BER_MSB.
24.VAGC
17
16
READ ONLY
VAGC[7:0]
8 bits data output in binary format for AGC information. 00
16
corresponds to the
minimum expected gain value, and FF
16
to the maximum.
25. MSE
18
16
READ ONLY
MSE[7:0]
MSE[7:0] represents the Mean Square Error of the demodulated output signal.
MSE[7:0] can be used as a representation of the signal quality.
26. VAFC
19
16
READ ONLY
VAFC [7:0]
VAFC[7:0] indicates the frequency offset F (in 2's complement) between the
transmitter and the receiver, when the carrier has been recovered.
F = (VAFC x RS) / 1024 . RS is the Symbol Rate.
27. IDENTITY
1A
16
READ ONLY
IDENTITY
contains the value 7B
16
which corresponds to revision 1 of the VES1820X.
28.ADC
1B
16
READ/WRITE
PCLK
PCLK sets the polarity of internal sampling clock. When an external ADC is used
PCLK must be set to 0 default (sampling on rising edge of SACLK). When the
internal ADC is used PCLK must be set to 1 (sampling on falling edge of SACLK).
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