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參數(shù)資料
| 型號： | 935263294551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44 |
| 封裝： | 10 X 10 X 1.75 MM, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 12/48頁 |
| 文件大?。?/td> | 324K |
| 代理商： | 935263294551 |
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Philips Semiconductors
Product specification
SC28L92
3.3V–5.0V Dual Universal Asynchronous
Receiver/Transmitter (DUART)
2
2000 Jan 21
853–2161 23016
DESCRIPTION
The SC28L92 is a pin and function replacement for the SCC2692
and SC26C92 operating at 3.3 or 5 volts supply with added features
and deeper FIFOs. Its configuration on power up is that of the
SC26C92. Its differences from the 2692 are: 16 character receiver, 16
character transmit FIFOs, watch dog timer for each receiver, mode
register 0 is added, extended baud rate and overall faster speeds,
programmable receiver and transmitter interrupts. (Neither the
SC26C92 nor the SCC2692 is being discontinued.)
Pin programming will allow the device to operate with either the
Motorola or Intel bus interface. The bit 3 of the MR0a register allows
the device to operate in an 8 byte FIFO mode if strict compliance
with the SC26C92 FIFO structure is required.
The Philips Semiconductors SC28L92 Dual Universal Asynchronous
Receiver/Transmitter (DUART) is a single-chip CMOS-LSI
communications device that provides two full-duplex asynchronous
receiver/transmitter channels in a single package. It interfaces
directly with microprocessors and may be used in a polled or
interrupt driven system with modem and DMA interface.
The operating mode and data format of each channel can be
programmed independently. Additionally, each receiver and
transmitter can select its operating speed as one of 28 fixed baud
rates; a 16X clock derived from a programmable counter/timer, or an
external 1X or 16X clock. The baud rate generator and counter/timer
can operate directly from a crystal or from external clock inputs. The
ability to independently program the operating speed of the receiver
and transmitter make the DUART particularly attractive for
dual-speed channel applications such as clustered terminal
systems.
Each receiver and transmitter is buffered by 8 or 16 character FIFOs
to minimize the potential of receiver overrun, transmitter underrun
and to reduce interrupt overhead in interrupt driven systems. In
addition, a flow control capability is provided via RTS/CTS signaling
to disable a remote transmitter when the receiver buffer is full.
Also provided on the SC28L92 are a multipurpose 7-bit input port
and a multipurpose 8-bit output port. These can be used as general
purpose I/O ports or can be assigned specific functions (such as
clock inputs or status/interrupt outputs) under program control.
The SC28L92 is available in two package versions: a 44-pin PLCC
and 44-pin plastic quad flat pack (PQFP).
FEATURES
Member of IMPACT family: 3.3 to 5.0 volt , –40°C to +85°C and
68K for 80xxx bus interface for all devices.
Dual full-duplex independent asynchronous receiver/transmitters
16 character FIFOs for each receiver and transmitter
Pin programming selects 68K or 80xxx bus interface
Programmable data format
– 5 to 8 data bits plus parity
– Odd, even, no parity or force parity
– - 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
16-bit programmable Counter/Timer
Programmable baud rate for each receiver and transmitter
selectable from:
– 28 fixed rates: 50 to 230.4k baud
– Other baud rates to MHz at 16X
– Programmable user-defined rates derived from a programmable
counter/timer
– External 1X or 16X clock
Parity, framing, and overrun error detection
False start bit detection
Line break detection and generation
Programmable channel mode
– Normal (full-duplex)
– Automatic echo
– Local loop back
– Remote loop back
– Multi-drop mode (also called ‘wake-up’ or ‘9-bit’)
Multi-function 7-bit input port (includes IACKN)
– Can serve as clock or control inputs
– Change of state detection on four inputs
– Inputs have typically >100k pull-up resistors
– Change of state detectors for modem control
Multi-function 8-bit output port
– Individual bit set/reset capability
– Outputs can be programmed to be status/interrupt signals
– FIFO status for DMA interface
Versatile interrupt system
– Single interrupt output with eight maskable interrupting
conditions
– Output port can be configured to provide a total of up to six
separate interrupt outputs that may be wire ORed.
– Each FIFO can be programmed for four different interrupt levels
– Watch dog timer for each receiver
Maximum data transfer rates:
1X – 1Mb/sec, 16X – 1Mb/sec
Automatic wake-up mode for multi-drop applications
Start-end break interrupt/status
Detects break which originates in the middle of a character
On-chip crystal oscillator
Power down mode
Receiver time-out mode
Single +3.3V or +5V power supply
Powers up to emulate SC26C92
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