參數(shù)資料
型號: 89C61X2
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 80C51 8-bit Flash microcontroller family
中文描述: 80C51的8位閃存微控制器系列
文件頁數(shù): 40/56頁
文件大小: 342K
代理商: 89C61X2
Philips Semiconductors
Product data
P89C60X2/61X2
80C51 8-bit Flash microcontroller family
64KB Flash, 512B/1024B RAM
2003 Sep 11
40
EX0
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables it.
BIT
IE.7
SYMBOL
EA
FUNCTION
Global disable bit. If EA = 0, all interrupts are disabled. If EA = 1, each interrupt can be individually
enabled or disabled by setting or clearing its enable bit.
Not implemented. Reserved for future use.
Timer 2 interrupt enable bit.
Serial Port interrupt enable bit.
Timer 1 interrupt enable bit.
External interrupt 1 enable bit.
Timer 0 interrupt enable bit.
External interrupt 0 enable bit.
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
ET2
ES
ET1
EX1
ET0
EX0
SU01522
ET0
EX1
ET1
ES
ET2
EA
0
1
2
3
4
5
6
7
IE
Address = 0A8H
Bit Addressable
Reset Value = 0X000000B
Figure 24. Interrupt Enable (IE) Register
PX0
Priority Bit = 1 assigns higher priority
Priority Bit = 0 assigns lower priority
BIT
IP.7
IP.6
IP.5
IP.4
IP.3
IP.2
IP.1
IP.0
SYMBOL
PT2
PS
PT1
PX1
PT0
PX0
FUNCTION
Not implemented, reserved for future use.
Not implemented, reserved for future use.
Timer 2 interrupt priority bit.
Serial Port interrupt priority bit.
Timer 1 interrupt priority bit.
External interrupt 1 priority bit.
Timer 0 interrupt priority bit.
External interrupt 0 priority bit.
SU01523
PT0
PX1
PT1
PS
PT2
0
1
2
3
4
5
6
7
IP
Address = 0B8H
Bit Addressable
Reset Value = xx000000B
Figure 25. Interrupt Priority (IP) Register
PX0H
Priority Bit = 1 assigns higher priority
Priority Bit = 0 assigns lower priority
BIT
IPH.7
IPH.6
IPH.5
IPH.4
IPH.3
IPH.2
IPH.1
IPH.0
SYMBOL
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
FUNCTION
Not implemented, reserved for future use.
Not implemented, reserved for future use.
Timer 2 interrupt priority bit high.
Serial Port interrupt priority bit high.
Timer 1 interrupt priority bit high.
External interrupt 1 priority bit high.
Timer 0 interrupt priority bit high.
External interrupt 0 priority bit high.
SU01524
PT0H
PX1H
PT1H
PSH
PT2H
0
1
2
3
4
5
6
7
IPH
Address = B7H
Bit Addressable
Reset Value = xx000000B
Figure 26. Interrupt Priority HIGH (IPH) Register
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