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參數(shù)資料
| 型號： | 8400110EKILF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | XO, clock |
| 英文描述： | OTHER CLOCK GENERATOR, QCC32 |
| 封裝： | 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 699K |
| 代理商： | 8400110EKILF |
ICS8400110I Data Sheet
LOW JITTER, TELCOM RATE-CONVERSION PLL
ICS8400110EKI REVISION A NOVEMBER 9, 2009
7
2009 Integrated Device Technology, Inc.
Parameter Measurement Information, continued
Input-to-Output Timing for Synchronous Clock
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. TheICS8400110I provides
separate power supplies to isolate any high switching noise from the
outputs to the internal PLL. VDD and VDDA should be individually
connected to the power supply plane through vias, and 0.01F
bypass capacitors should be used for each pin. Figure 1 illustrates
this for a generic VDD pin and also shows that VDDA requires that an
additional 10
resistor along with a 10F bypass capacitor be
connected to the VDDA pin.
Figure 1. Power Supply Filtering
REF
tREF<xx>P
tREFW
C65o
tREF<x>_C65D
tC65L
VDD
VDDA
3.3V
10
10
10F
.01F
10F
.01F
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 840011AG | 制造商:Integrated Device Technology Inc 功能描述:840011AG - Rail/Tube |
| 840011AGI | 制造商:Integrated Device Technology Inc 功能描述:840011AGI - Rail/Tube |
| 840011AGIT | 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK GEN SGL 8TSSOP - Tape and Reel |
| 840011AGLN | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 840011AGLNT | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Generator Single 8-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:8 TSSOP (LEAD-FREE) - Tape and Reel |
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