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參數(shù)資料
| 型號： | 7C1351-50 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 128Kx36 Flow-Through SRAM with NoBL TM Architecture |
| 中文描述： | 128K × 36至流通過與總線延遲TM架構(gòu)的SRAM |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 195K |
| 代理商： | 7C1351-50 |
CY7C1351
8
Capacitance
[10]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25
°
C, f = 1 MHz,
V
DD
= 3.3V
V
DDQ
= 3.3V
4
pF
C
CLK
Clock Input Capacitance
4
pF
C
I/O
Input/Output Capacitance
4
pF
Thermal Resistance
Description
Test Conditions
Symbol
TQFP Typ.
Units
Notes
Thermal Resistance
(Junction to Ambient)
Still Air, soldered on a 4.25 x 1.125 inch,
4-layer printed circuit board
Θ
JA
28
°
C/W
10
Thermal Resistance
(Junction to Case)
Θ
JC
4
°
C/W
10
Note:
10. Tested initially and after any design or process change that may affect these parameters.
3.0V
GND
OUTPUT
R=317
R=351
5 pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
ALL INPUT PULSES
1351-2
1351-3
OUTPUT
R
L
=50
Z
0
=50
V
L
= 1.5V
3.3V
AC Test Loads and Waveforms
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