參數資料
型號: 73S1217F-68M/F/PE
廠商: Maxim Integrated
文件頁數: 130/140頁
文件大?。?/td> 0K
描述: IC SOC SMART CARD READER 68QFN
標準包裝: 260
系列: *
DS_1217F_002
73S1217F Data Sheet
Rev. 1.2
9
Pin Name
Pin
(68
QFN)
Type
Equivalent
Circuit*
Description
INT3
48
I
General purpose interrupt input.
INT2
49
I
General purpose interrupt input.
SIO
47
IO
IO data signal for use with external Smart Card interface
circuit such as 73S73S8010x.
SCLK
45
O
Clock signal for use with external Smart Card interface
circuit.
PRES
53
I
Smart Card presence. Active high. Note: the pin has a very
weak pull down resistor. In noisy environments, an external
pull down may be desired to insure against a false card
event.
CLK
55
O
Smart card clock signal.
RST
57
O
Smart card Reset signal.
IO
61
IO
Smart card Data IO signal.
AUX1
60
IO
Auxiliary Smart Card IO signal (C4).
AUX2
59
IO
Auxiliary Smart Card IO signal (C8).
VCC
58
PSO
Smart Card VCC supply voltage output. A 0.47
μF capacitor
is required and should be located at the smart card
connector. The capacitor should be a ceramic type with low
ESR.
GND
56
GND
Smart Card Ground.
VPC
65
PSI
Power supply source for main voltage converter circuit. A
10
μF and a 0.1μF capacitor are required at the VPC input.
The 10
μF capacitor should be a ceramic type with low ESR.
VBUS
62
PSI
Alternate power source input from USB connector or hub.
VBAT
64
PSI
Alternate power source input, typically from two series cells,
V > 4V.
VP
54
PSO
Intermediate output of main converter circuit. Requires an
external 4.7
μF low ESR filter capacitor to GND.
LIN
66
PSI
Connection to 10
μH inductor for internal step up converter.
Note: inductor must be rated for 400 mA maximum peak
current.
ON_OFF
63
I
Power control pin. Connected to normally open SPST switch
to ground. Closing switch for duration greater than de-
bounce period will turn 73S1217F on. If 73S1217F is on,
closing switch will flag the 73S1217F to go to the off state.
Firmware will control when the power is shut down.
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