參數(shù)資料
型號: 73M1966B-DB-C
廠商: Maxim Integrated Products
文件頁數(shù): 51/88頁
文件大?。?/td> 0K
描述: BOARD DEMO 73M1966B CBL 20TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
系列: *
DS_1x66B_001
73M1866B/73M1966B Data Sheet
Rev. 1.6
55
Function
Mnemonic
Register
Location
Type
Description
SEL16K
0x13[0]
W
Sample Rate Mode Configuration Select
Configures the 16 kHz mode of operation. See also SR.
0 = 8 kHz sampling rate. (Default)
1 = 16 kHz sampling rate.
The 16 kHz mode is enabled by setting SR=1 followed by
SEL16K=1.
SR
0x22[7]
W
Sampling Rate Mode
Enables the 16 kHz mode of operation. See also SEL16K.
0 = 8 kHz sampling rate. (Default)
1 = 16 kHz sampling rate.
The 16 kHz mode is enabled by setting SR=1 followed by
SEL16K=1.
TCS
0x22[2:0]
W
Transmit Clock Slot
Controls the starting clock of the transmit channel. The clock slot
value allows the adding of an offset of up to 7 (111) bits to the time
slot value. A value of 000 is zero offset.
TPOL
0x20[7]
W
Transmit Polarity
0 = The transmit PCM data is to be transmitted based on the falling
edge of PCLK. (Default)
1 = The transmit PCM data is to be transmitted based on the rising
edge of PCLK.
TTS
0x20[6:0]
W
Transmit Time Slot
Selects the time slot number on the PCM highway for the
transmitter. The maximum number of 8-bit time slots is 128 (with a
PCLK frequency of 8.192 MHz). A value of 0000000 is time slot
zero and 1111111 is time slot 128. The default is 0000000.
TXBST
0x14[7]
WO
Transmit Boost
Used in conjunction with DAA to manage transmit level. See
Section 8.8.1.
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