參數(shù)資料
型號(hào): 73M1966B-DB-C
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 50/88頁(yè)
文件大?。?/td> 0K
描述: BOARD DEMO 73M1966B CBL 20TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: *
73M1866B/73M1966B Data Sheet
DS_1x66B_001
54
Rev. 1.6
Function
Mnemonic
Register
Location
Type
Description
RXDG
0x09[7:0]
WO
Receiver Digital Gain
These bits controls the value of the digital gain section of the
73M1x66B receive path. Each bit indicates either a gain or
attenuation value. The net value of the gain setting is the linear sum
of each attributed value. Reading the RXDG register returns all
zeros, regardless of what was written to them.
RX
DG
1
2
dB
RX
DG
6
dB
R
X
D
G
+
3
.5
d
B
RX
DG
+
2
d
B
RX
DG
+
1
d
B
R
X
D
G
+
0
.5
d
B
R
X
D
G
+
0.
2
5d
B
R
X
D
G
+
0.
1
25
d
B
Gain/Attenuate
0
0dB (default)
1
0
-12 dB
0
1
0
-6 dB
0
1
0
+3.5 dB
0
1
0
+2 dB
0
1
0
+1 dB
0
1
0
+0.5 dB
0
1
0
+0.25 dB
0
1
+0.125 dB
Examples:
10000000 -12dB
00100000 +3.5dB
00010011 +2 + 0.25 + 0.125 =2.375dB
01001000 -6 + 1 = -5dB
RXEN
0x16[6]
W
Receive Path Enable
1 = Enable Receive Path.
0 = Disable Receive Path. (Default)
RXG
0x14[1:0]
W
Receive Gain
Sets the receive path gain/attenuation. See Table 36.
RXOCEN
0x17[5]
W
Rx DC Offset Calibrate Enable
When RXOCEN is set to 1 and OFH, ENDC and ENNOM are reset
to 0, the receiver dc offset calibration process is enabled. RXOCEN
must be reset to 0 before OFH, ENDC and ENNOM are set to 1 in
order for the calibration to operate correctly. RXOCEN should not
be used in linear mode.
Default value is 0.
RXOM
0x25[7:0]
W
RX Offset Measurement
Stores the result of the receive offset measurement.
See Section 8.8.3.
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