參數(shù)資料
型號： 48e30
廠商： Holtek Semiconductor Inc.
英文描述： 8-Bit I/O Type MCU (With EEPROM)
中文描述： 8位I / O型微控制器（帶EEPROM）
文件頁數(shù)： 9/44頁
文件大?。?/td> 351K
代理商： 48E30
HT48E30
Rev. 0.00
17
January 12, 2004
Preliminary
EEPROM Data Memory
The 128
8 bits EEPROM data memory is readable and writable during normal operation. It is indirectly addressed
through the control register EECR ([40H] in Bank 1). The EECR can be read and written to only by indirect addressing
mode using MP1.
Label (EECR)
Bits
Function
0~3
Unused bit, read as
0
CS
4
EEPROM data memory select
SK
5
Serial clock input to EEPROM data memory
DI
6
Serial data input to EEPROM data memory
DO
7
Serial data output from EEPROM data memory
V D D
5 . 5 V
V L V R
0 . 9 V
0 V
R e s e t S i g n a l
R e s e t
* 1
* 2
N o r m a l O p e r a t i o n
R e s e t
L V R D e t e c t V o l t a g e
Low Voltage Reset
Note:
*1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of
1024 system clock pulses before entering the normal operation.
*2: Since low voltage has to be maintained in its original state until exceeding 1ms, therefore after a 1ms
delay, the device enters a reset mode.
E E C R
C S
S K
D I
D O
V D D
C o n t r o l
L o g i c
a n d
C l o c k
G e n e r a t o r
A d d r e s s R e g i s t e r
D I
C S
S K
D O
S a m e a s H T 9 3 L C 4 6
D a t a
R e g i s t e r
A d d r e s s D e c o d e r
M e m o r y C e l l A r r a y
1 K : ( 1 2 8 8 )
O u t p u t B u f f e r
EEPROM Data Memory Block Diagram
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