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參數(shù)資料
| 型號： | 48e30 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit I/O Type MCU (With EEPROM) |
| 中文描述： | 8位I / O型微控制器（帶EEPROM） |
| 文件頁數(shù)： | 16/44頁 |
| 文件大?。?/td> | 351K |
| 代理商： | 48E30 |
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Instruction Set Summary
Mnemonic
Description
Instruction
Cycle
Flag
Affected
Arithmetic
ADD A,[m]
ADDM A,[m]
ADD A,x
ADC A,[m]
ADCM A,[m]
SUB A,x
SUB A,[m]
SUBM A,[m]
SBC A,[m]
SBCM A,[m]
DAA [m]
Add data memory to ACC
Add ACC to data memory
Add immediate data to ACC
Add data memory to ACC with carry
Add ACC to data memory with carry
Subtract immediate data from ACC
Subtract data memory from ACC
Subtract data memory from ACC with result in data memory
Subtract data memory from ACC with carry
Subtract data memory from ACC with carry and result in data memory
Decimal adjust ACC for addition with result in data memory
1
(1)
1
(1)
1
(1)
1
(1)
1
(1)
Z,C,AC,OV
C
Logic Operation
AND A,[m]
OR A,[m]
XOR A,[m]
ANDM A,[m]
ORM A,[m]
XORM A,[m]
AND A,x
OR A,x
XOR A,x
CPL [m]
CPLA [m]
AND data memory to ACC
OR data memory to ACC
Exclusive-OR data memory to ACC
AND ACC to data memory
OR ACC to data memory
Exclusive-OR ACC to data memory
AND immediate data to ACC
OR immediate data to ACC
Exclusive-OR immediate data to ACC
Complement data memory
Complement data memory with result in ACC
1
(1)
1
(1)
1
(1)
1
(1)
1
Z
Increment & Decrement
INCA [m]
INC [m]
DECA [m]
DEC [m]
Increment data memory with result in ACC
Increment data memory
Decrement data memory with result in ACC
Decrement data memory
1
(1)
1
(1)
Z
Rotate
RRA [m]
RR [m]
RRCA [m]
RRC [m]
RLA [m]
RL [m]
RLCA [m]
RLC [m]
Rotate data memory right with result in ACC
Rotate data memory right
Rotate data memory right through carry with result in ACC
Rotate data memory right through carry
Rotate data memory left with result in ACC
Rotate data memory left
Rotate data memory left through carry with result in ACC
Rotate data memory left through carry
1
(1)
1
(1)
1
(1)
1
(1)
None
C
None
C
Data Move
MOV A,[m]
MOV [m],A
MOV A,x
Move data memory to ACC
Move ACC to data memory
Move immediate data to ACC
1
(1)
1
None
Bit Operation
CLR [m].i
SET [m].i
Clear bit of data memory
Set bit of data memory
1
(1)
1
(1)
None
HT48E30
Rev. 0.00
23
January 12, 2004
Preliminary
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