
Revision 1.2
211
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Instruction Set (
Continued
)
G
7.1.5.2
The index field (Table 7-14) specifies the index register
used by the offset mechanism for offset address calcula-
tion. When no index register is used (index field = 100),
the ss value must be 00 or the effective address is unde-
fined.
index Field (Index Selection)
7.1.5.3
In Table 7-8, the note
“
s-i-b is present
”
for certain entries
forces the use of the mod and base field as listed in Table
7-15. The first two digits in the first column of Table 7-15
identifies the mod bits in the mod r/m byte. The last three
digits in the first column of this table identify the base
fields in the s-i-b byte.
Base Field (s-i-b Present)
Table 7-14. index Field Encoding
Index Field
Index Register
000
001
010
011
100
101
110
111
EAX
ECX
EDX
EBX
none
EBP
ESI
EDI
Table 7-15. mod base Field Encoding
mod Field
within
mode/rm
Byte
(bits 7:6)
base Field
within
s-i-b
Byte
(bits 2:0)
32-Bit Address Mode
with mod r/m and s-i-b
Bytes Present
00
00
00
00
00
00
00
00
000
001
010
011
100
101
110
111
DS:[EAX+(scaled index)]
DS:[ECX+(scaled index)]
DS:[EDX+(scaled index)]
DS:[EBX+(scaled index)]
SS:[ESP+(scaled index)]
DS:[d32+(scaled index)]
DS:[ESI+(scaled index)]
DS:[EDI+(scaled index)]
01
01
01
01
01
01
01
01
000
001
010
011
100
101
110
111
DS:[EAX+(scaled index)+d8]
DS:[ECX+(scaled index)+d8]
DS:[EDX+(scaled index)+d8]
DS:[EBX+(scaled index)+d8]
SS:[ESP+(scaled index)+d8]
SS:[EBP+(scaled index)+d8]
DS:[ESI+(scaled index)+d8]
DS:[EDI+(scaled index)+d8]
10
10
10
10
10
10
10
10
000
001
010
011
100
101
110
111
DS:[EAX+(scaled index)+d32]
DS:[ECX+(scaled index)+d32]
DS:[EDX+(scaled index)+d32]
DS:[EBX+(scaled index)+d32]
SS:[ESP+(scaled index)+d32]
SS:[EBP+(scaled index)+d32]
DS:[ESI+(scaled index)+d32]
DS:[EDI+(scaled index)+d32]