參數(shù)資料
型號： 28F640J3C-120
廠商： Intel Corp.
英文描述： Intel StrataFlash Memory (J3)
中文描述： 英特爾StrataFlash存儲器（J3）
文件頁數(shù)： 57/72頁
文件大小： 905K
代理商： 28F640J3C-120
256-Mbit J3 (x8/x16)
Datasheet
57
(P+5)h
(P+6)h
(P+7)h
(P+8)h
4
Optional feature and command support (1=yes, 0=no)
bits 9–31 are reserved; undefined bits are “0.” If bit 31 is
“1” then another 31 bit field of optional features follows at
the end of the bit-30 field.
bit 0 Chip erase supported
bit 1 Suspend erase supported
bit 2 Suspend program supported
bit 3 Legacy lock/unlock supported
bit 4 Queued erase supported
bit 5 Instant Individual block locking supported
bit 6 Protection bits supported
bit 7 Page-mode read supported
bit 8 Synchronous read supported
Supported functions after suspend: read Array, Status,
Query
Other supported operations are:
bits 1–7 reserved; undefined bits are “0”
bit 0 Program supported after erase suspend
Block status register mask
bits 2–15 are Reserved; undefined bits are “0”
bit 0 Block Lock-Bit Status register active
bit 1 Block Lock-Down Bit Status active
V
CC
logic supply highest performance program/erase
voltage
bits 0–3 BCD value in 100 mV
bits 4–7 BCD value in volts
V
optimum program/erase supply voltage
bits 0–3 BCD value in 100 mV
bits 4–7 HEX value in volts
36:
37:
38:
39:
--0A
--00
--00
--00
bit 0 = 0
bit 1 = 1
bit 2 = 1
bit 3 = 1
(1)
bit 4 = 0
bit 5 = 0
bit 6 = 1
bit 7 = 1
bit 8 = 0
No
Yes
Yes
Yes
(1)
No
No
Yes
Yes
No
(P+9)h
1
3A:
--01
bit 0 = 1
3B:
3C:
bit 0 = 1
bit 1 = 0
Yes
(P+A)h
(P+B)h
2
--01
--00
Yes
No
(P+C)h
1
3D:
--33
3.3 V
(P+D)h
1
3E:
--00
0.0 V
NOTE:
1. Future devices may not support the described “Legacy Lock/Unlock” function. Thus bit 3 would have a
value of “0.”
Table 30. Primary Vendor-Specific Extended Query (Sheet 2 of 2)
Offset
(1)
P = 31h
Length
Description
(Optional Flash Features and Commands)
Add.
Hex
Code
Value
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