參數(shù)資料
型號(hào)： 21103
英文描述： AMD-K6 Processor Family Thermal Solutions Application Note AMD-K6 Processor Power Supply Design Application Note
中文描述： 的AMD - K6處理器系列散熱解決方案應(yīng)用指南的AMD - K6處理器電源設(shè)計(jì)應(yīng)用指南
文件頁(yè)數(shù)： 23/64頁(yè)
文件大小： 1056K
代理商： 21103
Decoupling and Layout Recommendations
13
21103G/0—February 1999
AMD-K6
Processor Power Supply Design
shown in Table 1 on page 15. Taking into account the ESR, the
following equation is used to calculate C
B
:
Example 2
Actual 3.2V @ 10A
This example assumes the maximum processor current
transient is 10A, the voltage tolerance of the processor is less
than 100mV (3.2V ± 100mV), and the voltage regulator
response time is 10
μ
s.
Using ten tantalum capacitors with 80-m
ESR (the parallel
resistance is 8m
) as bulk capacitors, the minimum bulk
capacitance is:
C
O
≥
((10A/(0.100
V – [10A
8m
]
))
10
μ
s = 5000
μ
F
In this example, the high current transient combined with the
tight regulation specification requires significantly more
decoupling capacitance than what is shown in Example 3.
Therefore, ten (5000/470=10.6) 470-
μ
F 55-m
capacitors are
required to satisfy this current transient and voltage
requirement. It is possible here to use either 10 or 11
capacitors. For the worst case, the correct approach is to round
up giving 11 capacitors. However, experience shows that
rounding down may be sufficient as it is extremely unlikely that
all capacitors will be at the maximum ESR.
Example 3
Actual 2.9V @ 7.5 A
This example assumes the maximum processor current
transient is 7.5A, the voltage tolerance of the processor is less
than 145mV (5% of 2.9V), and the voltage regulator response
time is 10
μ
s.
Using four tantalum capacitors with 60-m
ESR (the parallel
resistance is 15m
) as bulk capacitors, the minimum bulk
capacitance is:
C
O
≥
((7.5A/(0.145V – [7.5A
15m
]
)) 10
μ
s = 2300
μ
F
Five 470-
μ
F tantalum capacitors with 55-m
ESR meet this
requirement. However, if the brand of capacitor is changed to
one with a 100-m
ESR, the supply is out of tolerance.
C
≥
I
(
V – (
I
ESR))
t
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