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參數(shù)資料
| 型號(hào)： | 0W633-001-XTP |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | BelaSigna 250 - 16 bit Audio Processor, Full Stereo 2-in, 2-out; Package: LFBGA 57, 5x5; No of Pins: 57; Container: Tape and Reel; Qty per Container: 5000 |
| 中文描述： | 0-BIT, 50 MHz, MIXED DSP, PBGA49 |
| 封裝： | 5 X 5 MM, GREEN, CABGA-49 |
| 文件頁(yè)數(shù)： | 6/34頁(yè) |
| 文件大小： | 935K |
| 代理商： | 0W633-001-XTP |
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Rev. 7 | Page 14 of 34 | www.onsemi.com
BelaSigna 250
Table 6: Instruction Set (Continued)
Instruction
Description
Instruction
Description
OR A, Reg
OR register with AH to AH
SUB A, DRAM [,B]
Subtract (DRAM) from A
OR A, (Rij)
OR memory with AH to AH
SUB A, (Rij)p [,C]
Subtract program memory from A
OR A, DRAM [,B]
OR (DRAM) with AH to AH
SUB A, Rc [,C]
Subtract Rc register from A
OR A, (Rij)p
OR program memory with AH to AH
SUBI A, IMM [,C]
Subtract IMM from A
OR A, Rc
OR Rc register with AH to AH
SUSI A, SIMM
Subtract signed SIMM from A
ORI A, IMM
OR IMM with AH to AH
SWAP A [,Cond]
Swap AH, AL on condition
ORSI A, SIMM
OR unsigned SIMM with AH to AH
TGL Reg, Bit
Toggle bit in register
POP Reg [,B]
Pop register from stack
TGL (Rij), Bit
Toggle bit in memory
POP Rc [,B]
Pop Rc register from stack
TST Reg, Bit
Test bit in register
PUSH Reg [,B]
Push register on stack
TST (Rij), Bit
Test bit in memory
Table 7: Notation
Symbol
Meaning
Symbol
Meaning
A
Accumulator update
INV
Inverse shift
B
Memory bank selection (X or Y)
P
PH | PL update
C
Carry bit
PRAM
Program memory address (16-bits)
Cond
Condition in status register
Rc
Rc register (R0..7, PCFG0..2, PCFG4..6,
LC0/1)
DRAM
Low data (X or Y) memory address (8-bits)
Reg
Data register (AL, AH, X, Y, ST, PC, PL, PH,
EXT0, EXP, AE, EXT3..EXT7)
DW
Double word
Ri / Rj / Rij
Pointer to X / Y / either data memory
IE
Interrupt enable flag
SIMM
Short immediate data (10-bits)
IMM
Immediate data (16-bits)
SQ
Square
Architecture Overview
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